Prediction of CPU Idle-Busy Activity Pattern. Author: Qian Diao, Justin Song Presented by: Justin Song Intel Corporation 14 th International Symposium on High-Performance Computer Architecture Salt Lake City, UT - Feb 18, 2008. Agenda. Introduction Usage model
Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author.While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server.
Author: Qian Diao, Justin Song Presented by: Justin Song
14th International Symposium onHigh-Performance Computer Architecture
Salt Lake City, UT - Feb 18, 2008
Linux C-state policy
Use activity prediction result to direct C-state usage and performance compensation
Quad-core CPU package activity state change over time
Dual-core CPU package activity pattern over time
Co-processor based prediction time estimate
For DP CPU, 4 variables: (busy,busy)%, (busy, idle)%, (idle, busy)%, (idle, idle)%; 3 of them are independent; no aggregation for partial idlesResult
Distance from grand truth is prediction error
Smoothed follows observed very well
All states prediction: useful for location aware optimization
All-busy, all-idle, partial-idle prediction: useful for shared power plane optimization
*: power delta < transition energy (if OSPM selects C2/C3) or idle length > C2/C3 latency (if OSPM selects C1)
**: based on power numbers in figure 1 (source: ACPI spec ). It doesn’t represent real power of our experimentation processor.
***: based on latency numbers in figure 1 (source: ACPI spec ). It doesn’t represent real latency of our experimentation processor.