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Data acquisition system on Advanced TCA. M. Nomachi and S. Ajimura Osaka University, Japan. CAMAC – FASTBUS – VME / Compact PCI What ’ s next?. DAQ architecture & Downsizing. Network. Network. Network. Rack. Crate. CPU. Memory Mapped I/O. CPU. Module. Memory Mapped I/O. CPU.
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Data acquisition system onAdvanced TCA M. Nomachi and S. Ajimura Osaka University, Japan CAMAC – FASTBUS– VME / Compact PCI What’s next?
DAQ architecture & Downsizing Network Network Network Rack Crate CPU Memory Mapped I/O CPU Module Memory Mapped I/O CPU Chip ATCA JAN-2006
CPU: merits and demerits • Merits • Scalable, easy to communicate • Data base access • Demerits • Boot • Overhead • Maintenance ATCA JAN-2006
DAQ architecture Network Rack We choose memory mapped I/O in a crate. It makes easy to maintain CPU. There were many bad experiences on embedded CPUs. Crate CPU Memory Mapped I/O Module Chip ATCA JAN-2006
産業界の動向 • VME • 6U Euro card DIN connector • BUS • Compact PCI • 6U Euro card metric connector • BUS • ATCA • 8U Euro card metric connector • Serial link ATCA JAN-2006
From Schroff ATCA JAN-2006
There are 4 ports for one channel. • One port has one output and one input. • In order to make signal extraction easy, • 2 ports are used. (SpW uses 2 ports) • The other 2 ports are to extend band width. • It makes possible to use 4-layers PCBs. ATCA JAN-2006
From Schroff ATCA JAN-2006
Advanced TCA • Features • -48V DC power supply and on board DC converter for any voltages required. • 8U x 280 mm • Dual Star point to point differential connection • No definite protocol. • VME back plane is for VME protocol. While, ATCA back plane is only defined as 100 ohm differential. Any protocol can use ATCA back plane. ( for example, ATCA for physics instrumentation) ATCA JAN-2006
DAQ system Trigger module Front-end module Front-end Global trigger Trigger logic Pipe-line buffer Trigger control readout buffer Read out module Readout control Second level trigger network CPU To event builder ATCA JAN-2006
Dual star connection Trigger module Read out module CPU (T-kernel) • Asynchronous signals • (4 lines) • Trigger/Reset • Local trigger/Busy SpaceWire link (4 lines) Front-end module Front-end module Front-end module Front-end module Front-end module ATCA JAN-2006
Serial data transfer フロントエンドで使用するためには • フロントエンドの小規模なFPGAに実装できる簡単なプロトコル。 多くのシリアル転送ではクロックの再構築のためのPLLが必要であるが、フロントエンドで使用するにはPLLがなくても動作するプロトコルが望ましい。 • 高速レスポンスを実現するための短い遅延時間。 パイプライン処理を行わないフロントエンドでは遅延時間がそのままDead Timeとなってしまう。このため余計な処理を行わない単純なプロトコルが望ましい。 • ノイズ源とならない信号レベル。 デジタル信号の遷移はアナログ系のノイズ源となる。このため、LVDS等、振幅の小さい信号レベルが望ましい。 ATCA JAN-2006
Steve Parkes 2003 ATCA JAN-2006
非同期に動作するため、時間情報を保存して送ることが可能非同期に動作するため、時間情報を保存して送ることが可能 Steve Parkes 2003 ATCA JAN-2006
Steve Parkes 2003 ATCA JAN-2006
Steve Parkes 2003 ATCA JAN-2006
Steve Parkes 2003 ATCA JAN-2006
Steve Parkes 2003 ATCA JAN-2006
Steve Parkes 2003 ATCA JAN-2006
Steve Parkes 2003 ATCA JAN-2006
Steve Parkes 2003 ATCA JAN-2006
Steve Parkes 2005 ATCA JAN-2006
Steve Parkes 2005 ATCA JAN-2006
Steve Parkes 2005 ATCA JAN-2006
Steve Parkes 2005 ATCA JAN-2006
Steve Parkes 2005 ATCA JAN-2006
Steve Parkes 2005 ATCA JAN-2006
Write Operation Destination Source Write Request Write Command Write Data Request Write Data Authorisation Write Data Write Reply Write Data Indication Write Complete Confirmation Steve Parkes 2005 ATCA JAN-2006
Read Operation Destination Source Read Request Read Command Read Data Request Read Data Response Read Reply Read Data Confirmation Steve Parkes 2005 ATCA JAN-2006
SpaceWire • Remote Memory Access Protocol (RMAP) • RMAP is a protocol on the SpaceWire standard. • Register access has large overhead. • Block transfer works almost full speed. • It meets the requirements. Good enough. • PCI express and the other protocol may also meet the requirements. However, they may use too much logic (x10) for front-end FPGAs. ATCA JAN-2006
Interrupt on VME bus Interrupter Interrupt Request Broadcast Interrupt handler Read Vector Communication between strangers. ATCA JAN-2006
Device User program RMAP read Send return address processing Wake up message Response in 10~100 micro sec Device access ATCA JAN-2006
Interrupt register(event flag) Hardware implementation Wait event Return address timer Wake up message Read wake up message -1 : Busy. Another process is already waiting. 0: Event already exist. n>0 : Event occurs after “n” tick. Write interrupt register 0 : cancel ATCA JAN-2006
ATCA crate One crate holds 96ch of 500MHz FADCs. Total power is expected to be 260 W. ATCA JAN-2006
Virtual CAMAC on serial data link One crate holds 96ch of 500MHz FADCs. Total power is expected to be 260 W. Serial data way Crate controller ATCA JAN-2006
Trigger module 16 LVDS in 16 LVDS out 8 NIM in 8 NIM out Power consumption is about 10W Cyclone EP1C12 for trigger logic Cyclone EP1C6 for SpW 100Mbps SpW ATCA JAN-2006
500 MHz FADC 8 ch analog input FADC mezzanine card is developed at KEK (FINESSE format) Power consumption is About 20W Cyclone EP1C6 Cyclone EP1C12 for router 100Mbps SpW (8~9 MB/s from the module) Readout buffer with 128Mb SDRAM waiting second level trigger ATCA JAN-2006
Summary • SpaceWire Remote Memory Access Protocol provides compact and flexible interconnection in a module and inter-module connection. • Advanced TCA provide dual star LVDS connections. They are good to be applied for DAQ system • Downsizing may continue. • We might have another solution in the future. ATCA JAN-2006