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Image Rotation

This document details the algorithm and techniques for rotating images in Xilinx hardware. It covers both input and output image rotation using Hotelling transform with basis vectors cos(t) and sin(t). It evaluates the implications of random ordered data output and the potential for holes in the output if not oversampled. The demo algorithm demonstrates bilinear interpolation with high precision, while accommodating arbitrary file sizes and pixel bit precision. The document also presents customer-specific adaptations for multi-channel data handling and memory optimization.

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Image Rotation

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  1. Image Rotation Daniel E. Michek Xilinx Confidential

  2. Image Rotation DetailsRaster Scan Output • Choice to rotate input image or output image • Hotelling transform w/ basis vectors cos(t) and sin(t) • Rotate input image (raster scan order data output) • Sx = Dx*cos(t) + Dy*sin(t), Sy = Dy*cos(t) - Dx*sin(t) • Rotate output image (random order data output) • Dx = Sx*cos(t) - Sy*sin(t), Dy = Sy*cos(t) + Sx*sin(t) Xilinx Confidential

  3. Issues with random ordered data output • The incoming image is sent pixel by pixel to the random memory destination address. • This causes holes in the output if not over sampled. • Corners are not cleared because not all memory locations are written to with each image. Xilinx Confidential

  4. Demo Algorithm Brief • Resources -128x128 single channel 8bit • 881 Slices, 1 BRAM, 12 MULT18X18 • Uses 4x pixel speed access to memories for bilinear method with 1 frame latency • Arbitrary input from files • Automatically accommodates arbitrary file size and pixel bit precision with PreLoadFcn and StopFcn calls • Pan and Zoom incorporated • Simulation time for 128x128 image is ~8 minutes Xilinx Confidential

  5. Demo Algorithm Details • Requires 1 read memory and 1 write memory (2x image memory total) • Offset must be added to center the image • This gives an excellent opportunity to pan the image and zoom in. (Demo center and pan control) • Invalid addresses and data must be blocked • Bilinear precision allows up to 214 interpolation accuracy (27 width*27 height) with only 4 MULT18X18s Xilinx Confidential

  6. Center and Zoom • Non-centered Image • Zoomed Image (0.25) Xilinx Confidential

  7. Customer Specific Adaptations • Multi-Channel • Can take advantage of extra space in memory data width • 3 channel 12bit data fits in same memory footprint when using x33 memories • Faster memory access • Increases total memory to 8x but allow for 4 parallel reads (4x speed) • 8bit data can sit in same memory footprint when using x32 memories Xilinx Confidential

  8. 64x64 MatLab imrotate 64x64 ximrotate Qualitative Comparison Xilinx Confidential

  9. MicroBlaze MultiMedia Board Support Package • ZBT Memories mapped • ADV7185 (video input decoder) in process • Component/Svideo • Will output only valid image data • Awaiting customer specific requirements to match tokens with their proprietary board (Titan-Visicom) • ADV7194 (video output encoder) in process • Component/Svideo/VGA • RGB not planned Xilinx Confidential

  10. MBMM Board Support Package (continued) • 1 Supertoken contains bitstream allowing for use of any component, sub-tokens allow for hardware specific builds • Allows for seamless flow from System Generator/Partial HWIL to full HWIL to free running board • Download on web/~danielm • Self installing setup from m-file corrects for your install location Xilinx Confidential

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