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STMicroelectronics Proposal for IEEE 802.15.3a Alt PHY - UWB Technique

This document presents STMicroelectronics' proposal for an IEEE 802.15.3a Alternate PHY based on Ultra-Wideband (UWB) technique. It includes details on the proposed modulation, MAC enhancements, performance at different speeds, and criteria definition. This proposal will be presented during the May IEEE TG3a session in Dallas, Texas.

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STMicroelectronics Proposal for IEEE 802.15.3a Alt PHY - UWB Technique

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  1. Project: IEEE P802.15 Working Group for Wireless Personal Area Networks (WPANs) Submission Title: [STMicroelectronics proposal for IEEE 802.15.3a Alt PHY] Date Submitted: [09 May, 2003] Source: [Didier Helal (Primary) Philippe Rouzet (Secondary)] Company [STMicroelectronics] Address [STMicroelectronics, 39 Chemin du Champ des Filles 1228 Geneve Plan-les-Ouates, Switzerland] Voice [+41 22 929 58 72 or +41 22 929 58 66 ], Fax [+41 22 929 29 70], E-Mail :[didier.helal@st.com,philippe rouzet@st.com] Re: [This is a response to IEEE P802.15 Alternate PHY Call For Proposals dated 17 January 2003 under number IEEE P802.15-02/372r8 ] Abstract: [This document contents the proposal submitted by ST for an IEEE P802.15 Alternate PHY based on UWB technique.] Purpose: [Presentation to be made during May IEEE TG3a session in Dallas, Texas] Notice: This document has been prepared to assist the IEEE P802.15. It is offered as a basis for discussion and is not binding on the contributing individual(s) or organization(s). The material in this document is subject to change in form and content after further study. The contributor(s) reserve(s) the right to add, amend or withdraw material contained herein. Release: The contributor acknowledges and accepts that this contribution becomes the property of IEEE and may be made publicly available by P802.15. Didier Helal and Philippe Rouzet, STM

  2. STMicroelectronics Proposal forIEEE 802.15.3a Alternate PHY May 2003, Dallas, Texas Didier Hélal, Philippe Rouzet R. Cattenoz, C. Cattaneo, L. Rouault, N. Rinaldi, L. Blazevic, C. Devaucelle, L. Smaïni, S. Chaillou Didier Helal and Philippe Rouzet, STM

  3. Contents • UWB PHY Proposal • Proposed Modulation • Proposed MAC Enhancements • Proposed other criteria definition • Performances at 110Mb/s, 200Mb/s, 480Mb/s • PHY protocol Criteria • MAC protocol Enhancement Criteria • General Solution Criteria Didier Helal and Philippe Rouzet, STM

  4. Contents • UWB PHY Proposal • Proposed Modulation • Proposed MAC Enhancements • Other criteria definition • Performances at 110Mb/s, 200Mb/s, 480Mb/s • PHY protocol Criteria • MAC protocol Enhancement Criteria • General Solution Criteria Didier Helal and Philippe Rouzet, STM

  5. Proposed Modulation Pulse Position + Polarity Modulation Number of bits per pulse = 1, 2, or 3 Didier Helal and Philippe Rouzet, STM

  6. MODULATION Didier Helal and Philippe Rouzet, STM

  7. 1 bit / pulse 2 bits / pulse 3 bits / pulse Equally spaced Positions 1 2 3 4 t Tp = 300ps Didier Helal and Philippe Rouzet, STM

  8. 011 010 001 000 111 110 100 101 BIT MAPPING • Gray-invert mapping: takes advantage from the bi-orthogonal modulation PPM+Polarity. Didier Helal and Philippe Rouzet, STM

  9. Channel coding options • Turbo codes PCCC (Parallel Concatenation of Convolutional Codes) • Code rate 1/3. With puncturing:1/2, 2/3,7/8. • RSC (recursive systematic convolutional) 13,15(octal def.). • Block size: 512. • Low latency : 5 s • Convolutional codes for lower complexity • Code rate 1/3. With puncturing:2/3,7/8 • Constraint length: 7 -> [133,145,175] Didier Helal and Philippe Rouzet, STM

  10. Adaptive band Pulse shape • Pulse shape should be adapted to any regulation, provided the pulse power spectral density fits emission mask. • Flexibility on pulse shape enables compatibility with more stringent regulations worldwide. • See ref. IEEE 802.15-03/211r0. Didier Helal and Philippe Rouzet, STM

  11. Example of a full band pulse shape P1 Average TX power = 0.3 mW Peak emission power in 50MHz = -10 dBm BW-10dB = 7.26 GHz Didier Helal and Philippe Rouzet, STM

  12. FRAME:Known Training Sequencefor Frame Synchronization and Channel Estimation Frame Example of a simplified emitted pulse train Pulse shape not shown (use rectangle for clarity) Preamble Modulated user data Frame Preamble PRP Time Hopping +Polarity 2-PPM +Polarity (Time Hopping optional) Didier Helal and Philippe Rouzet, STM

  13. BEACON is a regular frame with appended preamble for Coarse Synchronization Beacon Beacon Preamble Frame Sync.+ Ch. Est Piconet Information Coarse Sync. PRP Time Hopping +Polarity Time Hopping +Polarity 2-PPM +Polarity (Time Hopping optional) Didier Helal and Philippe Rouzet, STM

  14. Scenario Cell synchronization Cell synch Cell synch Frame synch • COARSE SYNCHRONIZATION Superframe N Superframe N+1 Contention Free Period Beacon Contention Access Period MCTA 1 preamble CTA m header body CTA 2 CTA x preamble MCTA n CTA 1 preamble … … … … • Preamble Detection (search one sequence among 20) • Alignement (find end of beacon preamble) Didier Helal and Philippe Rouzet, STM

  15. Frame sent to DEV-A by DEV-B Preamble Body Header Scenario Cell synchronization Cell synch Cell synch Frame synch • FINE SYNCHRONISATION Superframe N Superframe N+1 Contention Free Period Beacon Contention Access Period MCTA 1 preamble CTA m header body CTA 2 CTA x preamble MCTA n CTA 1 preamble … … … … Frame Synchronisation Fine Synchronisationonly (made jointly with ch.est.) DEV-A and DEV-B are synchronized to PNC’s clock DEV-A’s clock is synchronized to DEV-B’s clock, and can start to demodulate the data contained in the frame sent by DEV-B. DEV-A wakes up, and needs to synchronize to DEV-B’s clock. Didier Helal and Philippe Rouzet, STM

  16. Scenario Cell synchronization Cell synch Cell synch • CLOCK SYNCHRONISATION • - correct clock drift between TX DEV and RX DEV Frame synch Superframe N Superframe N+1 Contention Free Period Beacon preamble Contention Access Period MCTA 1 preamble CTA m header body … CTA 2 CTA x preamble MCTA n CTA 1 preamble … … … Cell Synchronization =Coarse+Fine + Clock Didier Helal and Philippe Rouzet, STM

  17. Coarse Sync: Beacon Preamble Construction • Quadratic-Congruence Hadamard (QCH) sequence. • Length of QCH sequence for coarse sync.: LC = 79. • TH code: • Polarity code: derived from row of a Hadamard matrix of size 80 x 80. • PRP = 5.4 ns. TH offset resolution: 50ps. • Sequence is repeated R = 120 + 3 times. • Duration of coarse sync beacon preamble: DC = R*LC *PRP = 52.5 s. • Append after this beacon preamble, the regular frame preamble. • 20 different sequences to distinguish between piconets are enough. • i = 1,2,…,20: sequence number • n = 0,1,…,78: TH offset index One sequence: LC*PRP End of Beacon Preamble (EOBP) signature ….. + + + - - 120 repetitions Beacon preamble duration: DC = 52.5 s Didier Helal and Philippe Rouzet, STM

  18. Contents • UWB PHY Proposal • Proposed Modulation • Proposed MAC Enhancements • Other criteria definition • Performances at 110Mb/s, 200Mb/s, 480Mb/s • PHY protocol Criteria • MAC protocol Enhancement Criteria • General Solution Criteria Didier Helal and Philippe Rouzet, STM

  19. MAC enhancements Proposed MAC is compliant with existing MAC IEEE 802.15.3 • Introduction of optional minor MAC adaptations to optimize • Receiver power consumption • Complexity (synchronization) • Performance (ARQ) • Goal is to avoid CCA challenge Didier Helal and Philippe Rouzet, STM

  20. MAC improvements • MCTAs and Slotted Aloha used instead of CAP (CCA difficult with UWB-PHY) • Approximate frames Times Of Arrival (TOAs) • Announced by source DEV at the begining of CTA • Used for channel estimation & synchronization • Several ways of TOA signaling possible (I.e. one example presented after) • Benefits : • ARQ scheme can be improved (One ACK per CTA to lower overhead) • Hook for localization feature Didier Helal and Philippe Rouzet, STM

  21. TOA 4 TOA 3 TOA 2 TOA 5 TOA 1 TOA 6 Proposed TOA use by MAC for Frame synchronization • Joint Channel Estimation and Frame Synchronization • Estimation valid during channel stationarity (1ms) • Frame preamble built from repetition of QCH sequences (same family as coarse sequences) : duration = 3.4 s • Use of approximate frame TOAs to manage different lengths of frames MIFS MIFS MIFS MIFS MIFS Frame 4 Frame 5 3 6 MIFS MIFS Frame 1 Frame 2 CTA slot in superframe TOA 1 TOA 2 TOA 3 TOA 4 TOA 5 TOA 6 CTA Header announcing TOAs Didier Helal and Philippe Rouzet, STM

  22. PHY-SAP Data Throughput close toPayload Bit Rate Optimized Packet Overhead Times PHY Header, MAC Header (802.15.3 format), HCS use 61.5Mb/s mode Didier Helal and Philippe Rouzet, STM

  23. Contents • UWB PHY Proposal • Proposed Modulation • Proposed MAC Enhancements • Other criteria definition • Performances at 110Mb/s, 200Mb/s, 480Mb/s • PHY protocol Criteria • MAC protocol Enhancement Criteria • General Solution Criteria Didier Helal and Philippe Rouzet, STM

  24. Out-of-band rejection filter • Proposed: use elliptic filter with poles placed at known out-of-band interferers. e.g. BP 3rd order with pole at 2.45GHz Didier Helal and Philippe Rouzet, STM

  25. Contents • UWB PHY Proposal • Proposed Modulation • Proposed MAC Enhancements • Proposed other criteria definition • Performances at 110Mb/s, 200Mb/s, 480Mb/s • PHY protocol Criteria • MAC protocol Enhancement Criteria • General Solution Criteria Didier Helal and Philippe Rouzet, STM

  26. Proposed Alternate PHY enablesSingle Chip FULL CMOS solution Through DIRECT SAMPLING on 1 BIT and DIGITAL MATCHED FILTERING Learn pulse signature after channel propagation Didier Helal and Philippe Rouzet, STM

  27. Demodulation is performed by Match-Filtering Demodulation Rx signal Match-filtering The match-filter is the estimate of the pulse signature through channel propagation No pulse shape is assumed by receiver ! Take advantage of multi-path (complete immunity) Tx signal Channel Estimation Average Compound Channel Response Channel+ Noise Didier Helal and Philippe Rouzet, STM

  28. Channel estimation easy to implement • Each point of the channel estimation can be seen as one finger of a rake receiver 64 ns = 1280 fingers of 50 ps width • Channel estimation consists in coherent integration of received pulses. One bit ADC makes the operation a simple increment/decrement No multiplication or complex operator ! • Estimated gate count of the whole channel estimation block bit slice number of gates * number of bit of the counter * number of channel point (20*7*1280 = 179200 gates) • Power consumption Parallel hardware implementation of all fingers Frequency of operations is low (1/PRP) Didier Helal and Philippe Rouzet, STM

  29. Optional Antenna Pulse Generator ABR BP Filter ABR TDD PTC Clock Synthesizer Switch 1-bit ADC LNA RF block UWB System-on-Chip Block Diagram TX Data Frag-mentation TX Preparation Channel Coding Modulation & coding TX Control PTC Channel estimation Synchronization RX Control Demodulation Channel Decoding Defrag- mentation RX Data MAC block (Bottom part) Baseband block PTC = Piconet Time Control ABR = Adaptive Band Rejection MAC+BB+RF on same silicon except BP filter and Antenna Didier Helal and Philippe Rouzet, STM

  30. ABR BP Filter ABR Link Budget Optional Antenna Noise figure for all RX chain referred at the antenna output Pulse Generator TDD Switch Clock Synthesizer 2dB loss 1dB loss G = 16dB 1-bit ADC LNA NF = 3.5dB 2dB NF = 9dB Clock Jitter : 10ps rms (maximum from 0.13m silicon measurements) Implementation loss = jitter effect <2dB(varies with pulse shape) + 2dB margin in order to enable simplest demodulation Didier Helal and Philippe Rouzet, STM

  31. 110Mbps @ 10m, CM4 EFFECTIVE THROUGHPUT 123 Mbps MAXIMUM RANGE 14 m CM3 adds 0.1 dB to margin Didier Helal and Philippe Rouzet, STM

  32. 55Mbps @ 10m, CM4 EFFECTIVE THROUGHPUT 61.5 Mbps MAXIMUM RANGE 17 m Didier Helal and Philippe Rouzet, STM

  33. 200Mbps @ 4m, CM2 EFFECTIVE THROUGHPUT 247 Mbps MAXIMUM RANGE 8 m Didier Helal and Philippe Rouzet, STM

  34. 480Mbps @ 1m , CM2 EFFECTIVE THROUGHPUT 486 Mbps MAXIMUM RANGE 2.8 m CM1 adds 1 dB to margin Didier Helal and Philippe Rouzet, STM

  35. Option for 480Mbps extended range EFFECTIVE THROUGHPUT 500 Mbps MAXIMUM RANGE 5 m • Performances can be • improved by using: • PRP = 4ns • TC with code rate 2/3. Didier Helal and Philippe Rouzet, STM

  36. -100 3-7GHz 7 sub-bands -110 -120 -130 -140 -150 -160 -170 -180 -190 12 0 2 4 6 8 10 Comparison on different pulse shapes Pulse P2 BW = 3.3-7.2GHz At 110Mbps, CM4 or CM3, Link budget margin is 3 dB BW = 3.3-4.9; 6.1-7.2GHz At 110Mbps, CM4 or CM3, Link budget margin is 1.7dB Monopulse Adaptive band PPM-UWB system easily accommodates regulation impact on pulse shape Didier Helal and Philippe Rouzet, STM

  37. Coexistence and regulatory impact • Coexistence with in-band systems ensured by TX pulse shaping or filtering • System is independent from pulse shape • Transmit power control reduces interferences • Helped by location awareness capability (distance can be estimated with 3cm resolution) • No impact on current regulation • FCC’s Part 15 rules followed • Additional spectrum protection can be supported • 802.15.3 Power Management modes are supported (DSPS, PSPS, APS) Didier Helal and Philippe Rouzet, STM

  38. Simultaneously operating Piconets Single Interferer Interferer dint CM1, CM2, CM3 or CM4 multipath channel CM1, CM2, CM3 or CM4 multipath channel TX DEV Rx level = (limit PER=8%) + 6dB dref RX DEV Modulation : 2-PPM, Prp =5.4 ns, CR 1/3, 123 Mbps Continuous overlapping interferer transmission (worst condition) Didier Helal and Philippe Rouzet, STM

  39. Simultaneously operating PiconetsSingle piconet interferer • Dref/Dint is better than 3 (for 123 Mbps modulation) • CM3, CM4 supports interferer @ ~3 meters for a Ref source @ 10 meters • Interfering channel slightly impacts performance (better for low density channel such as CM1 and CM2, instead of CM3,CM4) -> 2.5 meters instead of 3 meters • Pulse BW impact performances Dref/Dint ~ (BW) • PRP or Datarate impact performances Dref/Dint ~ (PRP) using the same modulation scheme, just changing PRP (and along the datarate) • Gracefull degradation of performance in case of strong UWB interferer by adjusting PRP Didier Helal and Philippe Rouzet, STM

  40. Simultaneously operating PiconetsEffect of TH • Effect of Time hopping in modulated data on interferer immunity • Small effect, equivalent of ~0.1 dB • Effect is marginal on average but smooth some worst case • Marginal improvement for a marginal added complexity • TH may be kept as on option in standard (TBD) Didier Helal and Philippe Rouzet, STM

  41. Simultaneously operating Piconets Multiple Piconet interferers 3 Interferers dint Free space channel CM3 or CM4 multipath channel TX DEV Rx level = (limit PER=8%) + 6dB dref RX DEV Modulation : 2-PPM, Prp =5.4 ns, CR 1/3, 123 Mbps Continuous overlapping interferer transmission (worst condition) Didier Helal and Philippe Rouzet, STM

  42. Simultaneously operating PiconetsMultiple piconet interferer • Multiple Interferer use free space channel • Low width of pulse means small effect on receiver • Infinite rake architecture and 1 bit sampling gives strong performance here • 2 Interferers : Dref/Dint is better than 40 (for 123 Mbps modulation) • CM1, CM2, CM3, CM4 supports 2 interferers @ ~0.25 meters for a Ref source @ 10 meters • 3 Interferers : Dref/Dint is better than 13 (for 123 Mbps modulation) • CM3, CM4 supports 3 interferers @ ~0.7 meters for a Ref source @ 10 meters Didier Helal and Philippe Rouzet, STM

  43. Interference and Susceptibility System supports low Signal-to-Interferer-Ratios : SIR > -50dB for any in-band narrow-band Interferer • Adaptive Band Rejection 802.11a OFDM interferer : SIR>-30dB (at 5.3GHz or other) Generic in-band interferer : SIR>-30dB (at any frequency) • BaseBand Filtering rejection : SIR > -20dB All out-of-band interferers supported (according to IEEE 802.15-3a proposed criteria). Didier Helal and Philippe Rouzet, STM

  44. Power Consumption estimates Hypothesis : convolutional coding, channel estimation operating during 10% of time Didier Helal and Philippe Rouzet, STM

  45. Gate count & Consumption calcul (1/2)Example with the Channel Estimation • Each point of the channel estimation can be seen as one finger of a rake receiver.(I.e. 64 ns = 1280 fingers of 50 ps width) • The channel estimation consists to integrate coherently pulses. As the front-end is a one bit ADC, for each point of the channel, the operation is simply an increment/decrement.(I.e 1280 Inc/Dec for each pulse in TS, 1000 pulses -> 1.2 M Inc/Dec, No multiplication or complex operator !) • Estimated gate count : • We need about 20 gates for each bit slice of an up-down counter : on flip-flop, and add-sub and a few more for count gating. • So the gate count of the whole channel estimation block is : 20 * number of bit of the counter * number of point of the channel(Using parallel hardware implementation of each finger, to keep low clock rate of 1/PRP) • Consumption : • As the increment/decrement operation needs to be done only at each pulse the frequency is 1/PRP. • The estimation of the consumption in 0.13 m is 6 nW/Gate/MHz Didier Helal and Philippe Rouzet, STM

  46. Gate count & Consumption calcul (2/2) Didier Helal and Philippe Rouzet, STM

  47. Current Demonstrator Platform • RF transmitter and receiver : ASIC. • First chipset already in test • Full chipset on September 2003 • Baseband • Today : off-the-shelves board (Nallatech BenNuey) with FPGA Xilinx Virtex2 6000 • End of 2003 : ASIC 0.13 m • Current progress in demonstrator shows low risk manufacturability (Baseband in FPGA today implies easy migration to ASIC, RF already in test) Didier Helal and Philippe Rouzet, STM

  48. Lay-out of the clock generation block CMOS 0.13m Didier Helal and Philippe Rouzet, STM

  49. FPGA Floorplaning and Routing Current estimates on gate count and power consumption are based on real implementation Design Information ------------------ Target Device : x2v6000 Target Package : bf957 Target Speed : -4 Mapper Version : virtex2 -- $Revision: 1.4 $ Mapped Date : Fri May 09 11:15:23 2003 Design Summary -------------- Number of errors: 0 Number of warnings: 0 Number of Slices: 25,606 out of 33,792 75% Number of Slices containing unrelated logic: 0 out of 25,606 0% Number of Slice Flip Flops: 6,298 out of 67,584 9% Total Number 4 input LUTs: 36,944 out of 67,584 54% Number used as LUTs: 33,305 Number used as a route-thru: 3,639 Number of bonded IOBs: 93 out of 684 13% IOB Flip Flops: 67 Number of GCLKs: 1 out of 16 6% Didier Helal and Philippe Rouzet, STM

  50. Easy Manufacturability and attractive form factor • Full system can be built in CMOS technology • single chip • Die size estimated at less than 5mm2 in 0.13m • Antenna size : expected 3cm x 3cm (printed PCB) • Time to Market can be less than 1.5 years ! Didier Helal and Philippe Rouzet, STM

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