Outline

1. Outline • Transmitters (Chapters 3 and 4, Source Coding and Modulation) (week 1 and 2) • Receivers (Chapter 5) (week 3 and 4) • Received Signal Synchronization (Chapter 6) (week 5) • Channel Capacity (Chapter 7) (week 6) • Error Correction Codes (Chapter 8) (week 7 and 8) • Equalization (Bandwidth Constrained Channels) (Chapter 10) (week 9) • Adaptive Equalization (Chapter 11) (week 10 and 11) • Spread Spectrum (Chapter 13) (week 12) • Fading and multi path (Chapter 14) (week 12)

2. Received Signal Synchronization (Chapter 6) (week 5) • Receiver needs • Carrier Phase Estimation • Phase Locked Loops • Decision Directed Loops • Symbol Timing Estimation

3. Digital Communication System: Transmitter Receiver

4. Signal Parameter Estimation • Propagation Delay: phase and timing error received signal delay noise large, so phase very sensitive

5. Need separate estimators • Phase Estimation: very narrow bandwidth - slow - tracks sending fc – very accurate • Timing Estimation: - tracks changes in delay,  , - faster – less accurate Timing Estimation QAM Phase Estimation Select si for which Select si for which

6. Maximum Likelihood Estimates • Likelihood function, maximized if best estimate made Assume white Gaussian noise

7. Maximum Likelihood Carrier Phase Estimate • Assume Then ML function is

8. Maximum Likelihood Carrier Phase Estimate • A necessary condition yields:

9. Maximum Likelihood Carrier Phase Estimate • Implementing this: If the loop is stable, then this is a ML estimate

10. Maximum Likelihood Carrier Phase Estimate • Phase Locked Loop: Loop filter Voltage Controlled Oscillator (VCO)

11. Phase Locked Loop • Using an unmodulated carrier for s(t) and a simple loop filter

12. Phase Locked Loop • Using the phase of low pass equivalents and linearizing Stable second order system

13. Effect of noise on phase estimate • Gaussian noise added at input Equivalent linear system

14. Phase Locked Loop • Nice damping and

15. Phase Locked Loop • Stable second order system • Pole and zero cancel • Not second order

16. Phase Locked Loop • Effect of noise on phase estimate Gain large noise bandwidth small

17. Phase Locked Loop • Nice damping and

18. Phase Locked Loop • Conditions for nice damped system or

19. Phase Locked Loop • Effect of noise on phase estimate Gain very large noise bandwidth OK

20. Phase Locked Loop • Effect of noise on phase estimate Gain low noise bandwidth high

21. Phase Locked Loop • Summary of effect of noise on phase estimate • Best two cases

22. Decision Directed Loops • PLLs have problems when the signal is imposed on the carrier and carrier is no longer part of signal • This is very efficient for power so is usually the case in power limited systems! • SSB PAM, QAM, NRZ like this? • Need to create carrier or remove symbols • Removing symbols is Decision Directed

23. Decision Directed Loops • Maximum Likelihood Number of symbols used = K

24. Decision Directed Loops • Maximum Likelihood

25. Decision Directed Loops • Maximum Likelihood

26. Decision Directed Loops • PAM implementation

27. Decision Directed Loops • QAM implementation (get 2 phase estimates) ycn ysn

28. Non-Decision Directed Loops(Nonlinearity Loops) • Ad-hoc use of nonlinearity to “create” carrier • Have worse noise that decision directed

29. Non-Decision Directed Loops(Nonlinearity Loops) • Averaging the Likelihood function over all symbols get:

30. Non-Decision Directed Loops(Nonlinearity Loops) • Averaging the Likelihood function over all symbols get:

31. Symbol Timing Estimation • Assume only time has error

32. Symbol Timing Estimation • Assume only time has error

33. Symbol Timing Estimation • Realizing a loop from this: VCC = Voltage Controlled Clock = VCO

34. Joint Timing and Phase Estimation • Maximum Likelihood:

35. Joint Timing and Phase Estimation • Maximum Likelihood:

36. Joint Timing and Phase Estimation • General Case (but not QAM):

37. Joint Timing and Phase Estimation • Realization:

38. Joint Timing and Phase Estimation • QAM Realization: Noise dependant gain?

39. Joint Timing and Phase Estimation • QAM Realization: • Maybe integral in front of VCC can take care of sum over K? • There is a Simulink™ issue with zero delay loops so may need to add loop filter with delay just to get it to work.

40. Joint Timing and Phase Estimation • QAM Realization: • From Kobayashi 1971 IEEE Tran. Comm. • Referenced in book p 368. • Results in a different structure to book!

41. Joint Timing and Phase Estimation • QAM Realization: • From Kobayashi 1971 IEEE Tran. Comm. • Optimum gain coefficients