Advanced Electronics Testing Boards Development and Simulation

1. External Electronics : WP4 Andrei Nomerotski, LCFI Collaboration Meeting 28 March 2006 Outline • Test Boards for Sensors : MotherBoards • VME Electronics • Status and Plans • Oxford test setup

2. Sensor Testing Boards • Named MotherBoards • Functionality includes • Well for mounting of sensor and provisions for bond connections to external world • Distribution of CCD control sequences and biases to sensor • Generation of high current CCD clock • Preamps for readout of analogue information • Distribution of CPR control sequences and voltages • Readout of CPR • Temperature control and monitoring • Very complex board, needs to work at -40 C • Went through several revisions during last years

3. Motherboard MB4.2 • 10-layer PCB • Manufactured by Express Circuits

4. Motherboard MB4.2

5. VME Buffers • Standardized way to control and communicate with all test boards • Daughter cards take care of different specific applications : ex. Bias PS control, Sequencer etc.

6. Status and Plans • September 2005 : MB4.0 • Transformer clock drive (optimized for double-metal CPC2) • Nov 2005-March 2006 : MB4.2 • Clock drive based on MAX5057 MOSFET driver (can work with single-metal CPC2) • Fixed CPR2 pad mis-match Motherboards in the pipeline • Fully loaded MB4.2 for tests of CPC2 with CPR2 • Assembly started • MB4.3 : update of MB4.0 for double-metal CPC2 • Needed in May • MB5.0 : motherboard with CPD1 (custom clock driver chip) • Needed in September

7. Other Test Boards • CPD1 test board • Capable to exercise all features of CPD1 (custom clock drive) • Controlled by BVM2 • Test-load C~100nF with ultra-low inductance: custom made or TDK low inductance capacitors • Needed in August, specs first discussed last week • CPT1 test board • Analogue readout of e2V test CCDs (low clock voltage and low capacitance R&D sensors) • ‘Light’ version of MB4.2 • Needed in December, specs first discussed last week

8. Oxford Test Setup • The Oxford group is getting together a VME setup : CPC2 + MB4.2 + BVM2 • Goals • Fully test and exercise produced electronics, should improve understanding, quality and feedback • Analogue readout of CPC2 by summer • Perform additional CPC2 measurements, build up CCD expertise • Experiment with power provisions for the clock driver with real sensor and super-capacitors • Status • All components available – debugging started • CPC2 capacitance/frequency measurements performed and reported

9. Oxford Test Setup Light version of the RAL setup

10. Other measurements • CCD capacitance measurements : reported by Erik Devetak • Frequency response of CPC2 : LCR of sensor, transformer and connections conspire to produce resonances • Interesting to study to understand the sensor • Expect different behavior for single- and double-metal sensors • Can resonances be used to drive CPCCD? • In progress, first measurements agree with simple SPICE models (below)

11. Simulation of Capacitance and Inductance • A number of simulations has been performed for the bond wire connections • Using FastHenry freeware from MIT • Consistent with expectations and previous results • Interleaved phase/anti-phase bonds (see below) reduce the inductance by factor ~2 due to cancellation of magnetic fields • Gold tape bonds reduce the resistance by factor ~20 wrt Al wire bonds • Simulation of sensor capacitance agrees with Konstantin’s results • Silicon is treated as a dielectric • Plan to model the distribution of power for clocks

12. WP4 items not covered here • ISIS test boards • GigaBit (non-VME based, standalone) DAQ

13. Summary • Main components of external electronics is a variety of motherboards and BVM modules • Main results since last year : delivered MB4.2 and BVM2 – now used for CPC2 testing • A number of new boards in production and in plans • Oxford test setup is coming online • Simulation of LCR parameters for clock distribution in CPCCD