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Characteristics and Designs of SiGeC HBTs 含碳摻雜矽鍺異質接面雙載子電晶體的特性與設計 　　　　 指導教授 : 劉致為 博士

Characteristics and Designs of SiGeC HBTs 含碳摻雜矽鍺異質接面雙載子電晶體的特性與設計 　　　　 指導教授 : 劉致為 博士 　　 研究生　 : 劉寅昕 台灣大學電子工程學研究所 中華民國九十三年一月十七日. Outline. 1. Introduction. 1. Introduction 2. Carbon in SiGe alloy 3. Characteristics of SiGe(C) HBTs 4. Simulation of SiGe(C) HBT on SOI

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Characteristics and Designs of SiGeC HBTs 含碳摻雜矽鍺異質接面雙載子電晶體的特性與設計 　　　　 指導教授 : 劉致為 博士

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  1. Characteristics and Designs of SiGeC HBTs 含碳摻雜矽鍺異質接面雙載子電晶體的特性與設計 　　　　 指導教授 : 劉致為 博士 　　 研究生　: 劉寅昕 台灣大學電子工程學研究所 中華民國九十三年一月十七日

  2. Outline

  3. 1. Introduction 1. Introduction 2. Carbon in SiGe alloy 3. Characteristics of SiGe(C) HBTs 4. Simulation of SiGe(C) HBT on SOI 5. Summary and Future Works

  4. Motivation • Market and Technology drive in wireless and optical communication ! Source: Gartner Dataquest September 2001

  5. f f /fmax /fmax Linearity Linearity Breakdown Breakdown Integration Integration Cost Cost T T SiGe SiGe HBT HBT V V V O O V V O O GaAs GaAs HBT HBT V V V V V V X X X X RF RF - - CMOS CMOS X X X X X X V V V V SiGe advantages • High speed • --- HBT structure replace III-V compound group and work as high-speed based devices • High linearity • --- SiGe HBT has better linearity output than RF-CMOS • High breakdown • --- SiGe HBT provides higher breakdown voltage than RF-CMOS, but lower than GaAs • Low cost • --- high compatibility with Si VLSI technology, low cost with commercial productions V: good O : fair X : poor Ref: Jiann Yuan, SiGe, GaAs and InP HBTs, Wiley, 1999, P3.

  6. Technology roadmap Source: Conexant 2000 Ref: N. Nakamura, ISSCC, 1998

  7. 2. Carbon in SiGe alloy 1. Introduction 2. Carbon in SiGe alloy 3. Characteristics of SiGe(C) HBTs 4. Simulation of SiGe(C) HBT on SOI 5. Summary and Future Works

  8. Pseudomorphic Growth and Film Relaxation misfit dislocation formed at the Si／SiGe growth interface strained and relaxed SiGe on a Si substrate • unwanted !

  9. B diffusion in Si • B diffusion is a major concern in electronic devices like: B out-diffusion in bipolar ; B penetration in MOSFET • B diffusion enhanced in TED or OED, especially increased in thermal anneal Boron substitutional (immobile) • B out diffusion is mediated with Si interstitial: Bsubstitutional + I ==> Binterstitial Ref: A. Ural, et al., J. Appl. Phys., vol. 85, p. 6440, 1999.

  10. Parasitic barrier induced by B out-diffusion Source: process was executed in ERSO • Observed by the degradations in collector saturation current and Early Voltage ! Ref: E. J. Prinz et al., IEEE Elec.Dev.Lett., vol. 12, p. 661, 1991.

  11. C diffusion in Si/SiGe • SiGeC epitaxial grown on Si by UHVCVD • Ge=25%, B=6E19 cm-3, C=~0.1% • SiGeC layer thickness=20 nm • Carbon precursor from C2H4 • SIMS: Cs+ ion beam / 500 ev / incident angle 600 after anneal as-grown Substitutional-Interstitial exchange • Cs+ I CI Cs: immobile substitutional carbon I : self-interstitial Si CI: mobile interstitial carbon Ref: H. Rucker et al., IEDM, P. 345, 1999. Source: process was executed in ERSO

  12. Effects of Carbon incorporation into SiGe alloy Pros: • Substitutional C suppresses B out-diffusion • Substitutional C improves thermal stability of SiGe alloy Cons: • low solid solubility in Si (3-41017 cm-3 near the melting point) and Ge (1108~11010 cm-3) • SiC is the only thermally stable phase in Si • No stable Ge-C phases are known above this solid solubility limit of Ge => a large of various meta-stable C states formation including X-Ci, Bs-Ci, and Cs-Ci to make negative electrical defects.

  13. Substitutional C suppress B out-diffusion • Substitutional C can suppress B out-diffusion through reducing Si interstitial concentration by C out-diffusion from base Si interstitial and vacancy simulations B concentrations in SIMS Si substrate Si substrate SiC epi Epi C concentration = 1E20 cm-3 Thermal budget=900 0C 2 hour Interstitials eliminated in C-rich region Vacancies enhance 8X in C-rich region • CCDC >CIeqDI CCDC>CVeqDV I: interstitial V: vacancy • Cs+ I <=> Ci Cs <=> Ci + V Ref: H. Rucker et al., IEDM, P. 345, 1999.

  14. Experiments UHVCVD (ultra high vacuum chemical vapor deposition) C precursors: C2H4(ethylene), Planar structure and stable with its  -bond SiGe epitaxial growth conditions: • Growth pressure: 1 mtorr • Growth temperature: 550 C • GeH4: 36 sccm (5% in He) • B2H6: 50 sccm (5% in He) • SiH4: 70 sccm (in He) • C2H4: various (2% in He) • Advantages: • Low cost • Low risk in ESH • Easy preparations Source: process was executed in ERSO

  15. Cap Si 10 nm Si 40 nm Region (F) SiGeC 40nm C flow 100 sccm, B doped Mutli-quantum well Si / SiGeC / Si layer (3 X periods) Si 40 nm Region (B) SiGeC 40nm C flow 25 sccm, B doped Si 40 nm Region (A) SiGe 40nm, B doped Si seed layer 40 nm Si substrate Si/SiGe(C)/Si MQWs MQW epitaxial grown • Sample growth for SIMS and XRD measure • Epitaxial grown by UHVCVD • CR and 10:1 HF-last clean before growth • Low growth temperature 550 0C • Low growth pressure 1 mtorr • Boron concentration (nominal): 1E19 cm-3 • Germanium concentration (nominal): 20 % • C=0, 25, 50, 60, 75, 100 sccm, respectively • Carbon precursor from C2H4 • Region (A) works as a control • No apparent misfit / dislocation observed Source: process was executed in ERSO

  16. B in SiGeC (F) (E) (D) (C) (B) (A) • SIMS: Cs+ ion beam / 500 ev / incident angle 600 • Each peak corresponds the above SiGeC layer • Apparent broaden profiles can been observed at low C concentration (<50 sccm) • Ge fraction degrades due to high concentration C incorporation (>75 sccm) • small amount of Cs can effective reduce diffusivity of B • Optimal C2H4 flow rate ~ 75 sccm Source: process was executed in ERSO Source: process was executed in ERSO

  17. C in SiGe (F) (E) (D) (C) (B) (A) • SIMS: Cs+ ion beam / 500 ev / incident angle 600 • Each peak corresponds the above SiGeC layer • Apparent broaden profiles can been observed • C incorporation form complex cluster at high flow rate (>75 sccm) of C2H4 • Cs + Ci => Cs-Ci cluster (immobile) Or silicon-carbide formation Ref: J. W. Strane, et al., J. Appl. Phys., vol.76, p. 3656, 1994. Source: process was executed in ERSO

  18. Substitutional C from XRD XRD of Si/SiGe(C)/Si SQW Substitutional/total C ratio • Small amount of C2H4 progressively added in SiGe, a shift of 100 arcsec in the (400) x-ray diffraction peak at 75 sccm • Decrease of lattice constant by Cs incorporation • Lattice constant: aC=3.54 A , aSi=5.43 A, aGe=5.65 A • Broadened and weak diffraction intensity at C2H4=100 sccm • At C2H4 flow rate=75 sccm, Ctotal=0.2%, Cs=~0.08%. • The ratio of substitutional/total~0.4 • Higher C2H4 flow rate, substitutional C saturate ref: C. W. Liu Ph.D. thesis, Princeton, 1994 C. W. Liu, et al., J. Appl. Phys. 80, 3043 (1996 ) Source: process was executed in ERSO

  19. Cap Si 10 nm Si 40 nm Si0.75-yGe0.25Cy 20 nm, [B = 6E19 cm-3; y = 0, 0.1% or 0.5 %] Si seed layer 40 nm Si substrate Substitutional C improve thermal stability Test structure using SiGeC • Epitaxial grown by UHVCVD • Low growth temperature 550 C • Low growth pressure 1 mtorr • Boron concentration (SIMS): 6E19 cm-3 • Germanium concentration (SIMS): 25 % • C=0, 0.1% or 0.5% • Carbon precursor from C2H4 • Strain relaxation in SiGe layer with thermal anneal • Improve thermal stability of SiGe layer with small amount C incorporation Ref: process was executed in ERSO Source: process was executed in ERSO

  20. Morphology roughness • AFM measurement of Sample ( with C doped 0.5%), RMS=1.66nm • AFM measurement of Sample • ( with C doped 0.1%), RMS=0.27nm • Add Carbon into SiGe alloy • => make morphology roughness • Carbon concentration  => roughness  Source: process was executed in ERSO

  21. Cap Si 10 nm Si 40 nm Si0.8-yGe0.2Cy 40 nm, [y = 0, 0.02 %, 0.05 %] Si seed layer 40 nm Si substrate Photoluminescence Si/SiGe(C)/Si single quantum well • PL was measured by 488 nm Ar+ laser at 15K • Power density=0.2 Wcm-2 • Diameter of circular spot size~0.5 um • No SiC precipitates • Ge concentration=20 % • Significant attenuations of PL intensity observed at NP and TO peaks • DecreasingPL intensity shows defect formations from extra interstitial C atoms Source: Measurement was executed by T.-C. Chen, NTE EE

  22. 3. Characteristics of SiGeC HBTs 1. Introduction 2. Carbon in SiGe alloy 3. Characteristics of SiGe(C) HBTs 4. Simulation of SiGe(C) HBT on SOI 5. Summary and Future Works

  23. Why SiGe HBT ? • SiGe used in bipolar devices, high speed: SiGe epitaxy > Si implant • Narrow bandgap and quasi-drift e-field by graded profile SiGebase Source: D.L. Harame, IBM, 2002 Source: Nortel, R. Hadaway, Ethernet Standards, March 1999

  24. Why SiGeC HBT ? 2002 IBM 350 GHz Integrity with Si/SiGe BiCMOS SiGeC HBT offer higher speed Ref: J. D. Cressler and G. Niu, SiGe HBTs, Artech House, 2002 Source: D.L. Harame, IBM, 2002 • Integration challenge of HBT with CMOS --- Need low thermal cycle of HBT module --- Without degradation of core CMOS performance • Higher thermal stability cycle in HBT module --- SiGeC HBT module provide a higher thermal cycle --- Suppression of boron out-diffusion effect • Improvement of HBT devices --- Higher early voltage --- Better low-frequency noise

  25. Integration process for SiGe/SiGeC HBTs • Schematic of Single-Poly Non-Self-Aligned structure P-type substrate N+ buried layer Si epitaxy N / P well formation RTCVD SIC implantation Ultra Base engineering Isolation engineering Emitter engineering LOCOS AE = 0.6 * 10.8 um2 UHVCVD Si/SiGe/SiGeC Thermal budget: ~ 1000 0C several tens seconds for dielectric dense and emitter driving Contact & metallization

  26. SIMS (um) • Cs+ ion beam / energy=500 ev / incident angle=600 • Intended-doped Carbon concentration~0.2 % • Other dopant distributions are also exhibited Source: process was executed in ERSO

  27. C suppress B and enhance As As B • Carbon suppress B out diffusion, but enhance As diffusion • As diffusion is mediated by Si vacancy • As and B distributions extracted from total SIMS profile Source: process was executed in ERSO Ref: H. Rucker et al., IEDM, P. 345, 1999.

  28. XRD • Control wafers used to observe strain compensation as carbon incorporated into SiGe layer • Substitutional carbon is estimated to: 0.08 % • Interstitial carbon is estimated to: 0.12 % Source: process was executed in ERSO

  29. DC characteristics Output curve Gummel plot IC IB • When VBE=0.65V, IC(SiGeC)/IC(SiGe)=1.6 => improve Ic ~60% • Collector current doesn’t degrade => substitutional C effective suppress boron out-diffusion in base • Non-ideal current in SiGeC HBT indicates carrier recombination caused by interstitial-related defects Ref: process was executed in ERSO

  30. Flicker noise • SIB: spectral density of base current noise • SIB: SiGeC larger ~8X than SiGe at IB=100 uA • SIB = K × IB2 / f (K: the factor related to the defect density; f: the operation frequency) • interstitial carbon affect carrier transport making larger 1/f noise Ref: process was executed in ERSO

  31. RF characteristics fT B=WB2/2DB C=Xdbc/2Vsat • fT peak (SiGeC HBT)=75GHz > fT peak(SiGe HBT)=72 GHz • C suppress B out-diffusion providing shorter base,b decrease fmax • fmax peak (SiGeC HBT)=26GHz > fmax peak (SiGe HBT)=19GHz • Slightly higher fT and low Cbc make larger fmax in SiGeC HBT Source: process was executed in ERSO

  32. SiGe HBT SiGeC HBT Early Voltage • Early Voltage (SiGeC HBT)>Early Voltage (SiGe HBT) improve >2X • Low Cbc is contributed to high Early Voltage, nieb almost same Source: process was executed in ERSO

  33. 4. Simulation of SiGe(C) HBTs on SOI 1. Introduction 2. Carbon in SiGe alloy 3. Characteristics of SiGe(C) HBTs 4. Simulation of SiGe(C) HBT on SOI 5. Summary and Future Works

  34. Motivation

  35. Target

  36. Simulation structures FD collector Lcol=0.1~0.2 um BOX=0.06~0.20 um VBE=0.4~1.0V VCB=2V Simulation by commercial simulator: ISE Fixed conditions Emitter: AE=0.14*10 um, NE=1E20 cm-3 Base: TB=0.07 um, NB=2E18 cm-3, SiGe(C) epi Collector: Nc=1E17 cm-3 SOI: Tsi=0.15um no N+ buried layer Lcol=0.1~0.2 um Bulk: Tsi=0.3 um N+ buried layer Lcol=0.15 um Source: EE times, IBM, 2002

  37. E-field and depletion region • Depletion region of bulk HBT with VCE=2V no obvious depletion region • E-field (vertical and lateral ) comparison of bulk HBT and SOI HBT E B C reach-through reach -through collector vertical lateral • Depletion region of SOI HBT with VCE=2V almost all collector depleted • E-field (vertical ) comparison of SOI HBT • devices with different BOX reach -through collector E B C BOX

  38. Buried oxide thickness effects • Output characteristics of SOI and bulk HBTs IB=0.1 uA/um IB=0.01 uA/um • VA(SOI, BOX=0.15 um): 155 V ; VA(Bulk): 98 V at IB=0.1 uA/um • Lateral-extended depletion region in SOI HBT, effective depletion region increase, so CdBC decrease • Lcol=0.15 um

  39. Early Voltage v.s CdBC • Early Voltage of SOI and bulk HBTs v.s CdBC • As BOX thickness decreases, CdBC slightly decreases. All smaller than bulk • As BOX thickness decreases, Early Voltage increases due to smaller CdBC All larger than bulk

  40. fmax v.s CCS • As BOX thickness decreases, CCS increases, smaller than bulk • As BOX thickness decreases,fmax inversely increases, larger than bulk • Lcol=0.15 um

  41. RF characteristics • SOI HBT has lower fT than bulk HBT • SOI HBT has higher fmax than bulk HBT at BOX thickness > 0.1 um • As BOX thickness increases, fT decrease due to long BC depletion region • As BOX thickness increases, fmax increases due to low CCS • Lcol=0.15 um

  42. BVCEO v.s E-field • As BOX thickness decreases, peak e-field in B-C interface increases, due to extra voltage drop across thick BOX • As BOX thickness decreases,BVCEO inversely increases, due to smaller e-field • Lcol=0.15 um

  43. Lateral design • E-field distributions between different Lcol (lateral-cut direction) in SOI HBT n- collector n+ reach-through • BOX thickness is fixed at 0.15 um, different Lcol from 0.1 ~ 0.2 um, Collector doping is 1E17 cm-3 • As Lcol distance increases, depletion region extends, e-field distributes and lower peak value

  44. RF characteristics • RF characteristics of SOI HBT devices with different Lcol distances • As Lcol distance increases, fT decreases due to carrier transferring across longer depletion region • As Lcol distance increases, fmax decreases due to smaller fT

  45. Trade-off of fT and BVCEO • Trade-off of fT and BVCEO in SOI HBT devices with different Lcol distances • As fT*BVCEO as a figure of merit, as Lcol distance increases, fT decreases, but BVCEO increases, a trade-off exists • Optimal Lcol design depends the circuit application and user need

  46. 5. Summary and further works 1. Introduction 2. Carbon in SiGe alloy 3. Characteristics of SiGe(C) HBTs 4. Simulation of SiGe(C) HBT on SOI 5. Summary and Future Works

  47. Summary

  48. Conclusion 1. The substitutional/total C ratio provided by our system is < 0.4 2. Narrow process window for using C2H4 to satisfy the demand of reducing CI and suppressing B out-diffusion is restricted at total C concentration < 0.2 % in our system 3. If the precise control of epitaxy process is executed , C2H4 is able to utilize as C precursor 4. SOI devices can have better Early voltage than bulk due to low CdBC 5. As the BOX thickness increases => fT => mainly caused by e-field re-distribution => fmax=> because of low Ccs => BVCEO  => due to smaller BC E-field A trade-off design exists between the different BOX thickness 6. As the distance of C-sinker increases => fT => mainly caused by depletion region extending => BVCEO => due to lower lateral E-field A trade-off design exists between the different Lcol

  49. Further works • Use other C-doped sources in SiGe HBT, like methyl-silane (SiH3CH3) • 2. Simulation using 3D structure of HBT on SOI with thermal resistance • 3. Plan to wafer-start of HBT fabricated on SOI

  50. Acknowledgments ERSO group in ITRI: P. S. Chen, Z. Pei, L. S. Lai (now tsmc), C. S. Liang, Y. T. Tseng, M. H. Lee, Y. M. Shiu, S. C. Lu, and M.-J. Tsai, for epitaxy growth, measurements and advisements. NTU group: T. C. Chen (PL and CV measurements) S. T. Chang (simulation) W. C. Hua (noise)

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