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Fault-Tolerant SemiFast Implementations of Atomic Read/Write Registers

Fault-Tolerant SemiFast Implementations of Atomic Read/Write Registers. Nicolas Nicolaou, University of Connecticut Joint work with: C. Georgiou, University of Cyprus A. A. Shvartsman, University of Connecticut. What is an Atomic R/W Register?. Register. Read. Write(7). Write(0).

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Fault-Tolerant SemiFast Implementations of Atomic Read/Write Registers

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  1. Fault-Tolerant SemiFast Implementations of Atomic Read/Write Registers Nicolas Nicolaou, University of Connecticut Joint work with: C. Georgiou, University of Cyprus A. A. Shvartsman, University of Connecticut

  2. What is an Atomic R/W Register? Register Read Write(7) Write(0)

  3. Prior Results • Attiya et al. 1995 - Single Writer Multiple Reader (SWMR) model where <1/2 of processes may crash: • Pairs <value, tag> are used for ordering operations • Writer increases tag and sends <value, tag> to a majority • Reader: • Phase 1: obtains maximum tag from a majority • Phase 2 propagates the tag to a majority and then returns the value associated with that tag • Lynch, Shvartsman 1997 and Englert, Shvartsman 2000 extend the above result for MWMR • Quorums instead of majorities • 2 round protocols for read/write operations

  4. Fast Implementations • Dutta, Guerraoui, Levy, Chakraborty 2004 • SWMR model • Single communication round for all write and read operations • Requires R < (S/t) – 2 • R: # readers, S: # servers, t: max # server failures • Not applicable to MWMR Question: Can one introduce SemiFast Implementations (with fast reads or fast writes) to relax the bound on the number of readers?

  5. Our Contributions • Formally define semifast implementations • Develop a semifast implementation • Based on Fast implementation of Dutta et al. 04 • Introduce the notion of virtual nodes • Bounds On the Number of Virtual Nodes • V < (S/t) - 2 • Show that no SemiFast implementations are possible for MWMR • Allow n communication rounds for the reads • Simulation Results • A small percentile of read operations require a second communication round.

  6. Semifast Implementations Def. An implementation I is semifast if it satisfies the following properties (informally): • All writes are fast • All complete read operations perform oneor twocommunication rounds • Ιf a read operation ρ1performs two communication rounds, then all read operations that precede or succeedρ1 and return the same* value as ρ1 are fast • Τhere exists some execution of I which contains onlyfast read and write operations * Assuming all written values are unique

  7. Simulation Results • NS2 Simulator • Only 10% of read operations need to perform 2nd communication round • Stochastic Environment • Fix Interval Environment

  8. Conclusions • Definition of Semifast implementations: • Only one complete read operation has to perform 2 comm. rounds for every write operation • #Virtual Nodes < (S/t) - 2 • No semifast implementation possiblefor MWMR model

  9. References [Partha Dutta, Rachid Gerraoui, Ron R. Levy and Arindam Chakraborty, How Fast can a Distributed Atomic Read be, Proceedings of the 23rd annual ACM Symposium on Principles of distributed computing (PODC 2004), pp. 236- 245, ACM press 2004.] [S. Dolev, S. Gilbert, N.A.Lynch,A.A.Shvartsman,J.L.Welch Geoquorums:Implementing Atomic Memory in Mobile Ad-Hoc Networks, Technical Report LCS-TR-900, MIT (2003) ] [Nancy Lynch and Alex Shvartsman. Rambo: A reconfigurable atomic memory service for dynamic networks. In Proceedings of the 16th International Symposium on Distributed Computing, pages 173-- 190, 2002 ] [H.Attiya, A.Bar-Noy, and D.Dolev Sharing memory robustly in message-passing systems, Journal of the ACM, January 1995.] [B. Englert and A. A. Shvartsman. Graceful quorum reconfiguration in a robust emulation of shared memory.In International Conference on Distributed Computing Systems, pages 454–463, 2000] [N. A. Lynch and A. A. Shvartsman. Robust emulation of shared memory using dynamic quorumacknowledged broadcasts. In Symposium on Fault-Tolerant Computing, pages 272–281, 1997]

  10. Questions?

  11. Atomicity [Lynch96] • Valid Executions: • Invalid Executions: write(8) write(8) ack( ) Time Time read( ) ret(0) read( ) read( ) ret(0) ret(8) write(8) ack( ) write(8) Time Time read( ) ret(0) read( ) ret(0) read( ) ret(8) read( ) ret(0)

  12. Definitions • Each process invokes 1 operation at a time. • Each operation consists of: • Invocation Step • Matching Response Step • Incomplete Operation: no matching response for the invocation. Complete operation • op1 precedes op2 => response for op1precedes invocation for op2. • If op is a read we write “rd” • If op is a write we write “wr”

  13. Definitions (Cont.) Algorithm implements a register => satisfies termination and atomicity properties • Termination: Every operation by correct process completes. • Atomicity (SWMR, wrk:kth write): • If rd returns x then there is wrk s.t. valk=x • If wrk precedes rd and rd returns valj, then j k • If rd returns valk then wrk precedes or is concurrent to rd • If rd1 returns valk and a succeeding rd2 returns valj then j k

  14. Atomic vs Shared Register • Shared Register: • Accessible from Single Process • Write(v): Stores the value v and returns OK • Read(): Read the last value stored • Atomic Register: • A distributed data structure • Accessed by multiple processes concurrently • Behaves as a sequential register. • (Recall Atomicity)

  15. Atomic vs Shared Register(Graphical) • Sequential Register: • Atomic Register: Register=0 Register=8 Read(0) WriteAck() Read(8) Write(8) Register WriteAck( ) ReadAck2(0) Read1( ) ReadAck1(8) Read2( )

  16. When a SemiFast Impl. is Impossible? • When V<(S/t)-2 • If V≤(S/t)-1 then No fast implementation even in the case of a skip-free write operation. (violates non-triv. Property 3) • If V=(S/t)-2 then there is an execution where we need 2 complete read operations to perform 2 com. rounds. (violates Property 1) • When V=(S/t)-2 • There exists an execution where 2 read operations return the same value and they both perform 2 com. rounds (violates Prop. 2).

  17. No Semifast for MWMR model. Proof Sketch: • Split multiple round operations into: • Read phases • Write phases • Show that as soon as an operation performs a write phase cannot change its return value. • Show a construction where W=2, R=2 and t=1 and atomicity is violated.

  18. Challenge How fast can a general implementation of an Atomic Register can be? • Dynamic Environment (Mobility) • Hybrid implementations with some read and write operations to perform multiple roundtrips. • Communication Overhead in such impl.? • Quorum based algorithms. How fast can they be?

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