1 / 19

Digital to Analog Converter for High Fidelity Audio Applications

Digital to Analog Converter for High Fidelity Audio Applications. Matt Smith Alfred Wanga CSE598A. Project Summary. High Quality Audio Applications Accurate Reproduction [16 bit] Low Noise Versatile Support for Standard Sampling Rates

jenniferglewis
Download Presentation

Digital to Analog Converter for High Fidelity Audio Applications

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Digital to Analog Converter for High Fidelity Audio Applications Matt Smith Alfred Wanga CSE598A

  2. Project Summary • High Quality Audio Applications • Accurate Reproduction [16 bit] • Low Noise • Versatile • Support for Standard Sampling Rates • Specifications that allow use in Various Audio Applications

  3. R-2R Ladder Architecture * Buffer inserted on output for low output impedance

  4. D Flip Flop Schematic

  5. D Flip-Flop Simulation Results CLK DIN Q QNOT

  6. Pass Switch • NMOS pass transistor only • CMOS Transmission gate not needed because we don’t go near VDD • Sized to allow proper operation

  7. Voltage Reference

  8. Voltage Reference Results • Circuit modified from Homework #3 (2.5V reference) • Reference output stable down to ~3.3V supply voltage • Temperature varies by 400mV over -40C to 85C (3.2 mV/˚C)

  9. Voltage Reference Results • Power supply rejection ratio is 48dB • LSB accuracy corresponds with 7mV p-p supply noise

  10. Resistor • 50K resistor takes ~1700 um2 • We used values of 50K, 25K, 16K, and 8K • Unexpectedly, resistors ended up being a small portion of our total layout

  11. Output Buffer • Unity gain opamp • Open loop gain = 2560

  12. Output Buffer The high end wasn’t a problem – we wouldn’t go that high But what to do about the low end?

  13. Output Filter This noise is partly an artifact of simulation, but a low-pass filter is a good idea anyway

  14. Complete Design Schematic

  15. Layout Bias 0 7 15 8 Opamp Tx_gate (2 huge NMOS) 50K resistor D - Flip Flop

  16. Simulation Results Complete-circuit simulation with top 7 bits active and the rest tied high (This simulation took >15 minutes to run and almost overran my storage space)

  17. Simulation Results • Full-circuit simulation with all 16 bits operating. • LSB increments are 28uV • Noise peaks are 1/4LSB

  18. Design Assessment • Maximum output voltage: 3.441V • Minimum output voltage: 1.604V • Voltage swing: 1.836V • LSB voltage change: 28uV • Calculated and observed agree to +- 0.2uV • Just a little noisy … simulation problem or real?

  19. Future Work / Improvements • Increase resistance values to decrease tx_gate size • Temperature stability (reference) • Wide swing output • Decrease noise on output

More Related