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Digital to Analog Converter for High-Fidelity Audio Applications

This summary discusses the R-2R ladder architecture, current progress, remaining work, observations, challenges, and the schedule for completing the project.

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Digital to Analog Converter for High-Fidelity Audio Applications

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  1. Digital to Analog Converter for High-Fidelity Audio Applications Matt Smith Alfred Wanga CSE598A

  2. Summary • R-2R Ladder Architecture • Current progress • Poly resistor, NOR gates, D-flipflops • Remaining work • Observations and challenges • Schedule

  3. 3R2 R2 Vout [ ] x 3 R-2R Ladder Architecture Gain of 3 on output stage allows full voltage range on output, in addition to buffering for low output impedance

  4. Current Progress • Digital Logic • Flip flops used to latch digital inputs • Gate logic optimized for digital transition point • D flip flop was designed from NOR gate logic • Layout and testing complete • Polysilicon Resistors • Values of 7kΩ and 14kΩ chosen for R-2R ladder resistors

  5. Polysilicon Resistors • Serpentine pattern used to construct standard (7k) and double (14k) sized resistors • Resistance calculated from process parameters • Since resistors are needed in R-2R ratios, exact poly sheet resistance is no concern (all resistors are affected proportionately)

  6. NOR Gate Logic A B OUT

  7. D Flip Flop • Layout done with metal1 and metal2, leaving metal3 for global routing Inverter NOR3 NOR2

  8. D Flip-Flop Simulation Results CLK DIN Q QNOT

  9. Remaining Work • Output Buffer • Linear, Large (Current) Gain • Large output swing needed • Design Layout Characterization • Signal Distortion • Maximum Load Impedance • Frequency Response

  10. Observations and Challenges • Use of hierarchical cells reduced the complexity and time needed for schematics and layout • Line resistance is not calculated during layout extraction, making simulation of polysilicon-based resistors more difficult

  11. The Schedule • 3/13 – Finish individual cells, figure out how to properly simulate poly resistors • 3/20 – Do full layout • 3/27 – Simulation • 4/3 – Debug, prepare presentation

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