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Shanna-Shaye Forbes sssf@eecs.berkeley *University of California, Berkeley

An Automated Mapping of Timed Functional Specification to A Precision Timed Architecture Shanna-Shaye Forbes*, Hugo A. Andrade**, Hiren D. Patel* and Edward A. Lee*. Shanna-Shaye Forbes sssf@eecs.berkeley.edu *University of California, Berkeley *National Instruments Corporation. Overview.

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Shanna-Shaye Forbes sssf@eecs.berkeley *University of California, Berkeley

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  1. An Automated Mapping of Timed Functional Specification to A Precision Timed ArchitectureShanna-Shaye Forbes*, Hugo A. Andrade**, Hiren D. Patel* and Edward A. Lee* Shanna-Shaye Forbes sssf@eecs.berkeley.edu *University of California, Berkeley *National Instruments Corporation

  2. Overview Programming languages generally abstract away the notion of timing at the software level. We overcome this shortcoming by combining an architecture which has repeatable timing with a model based programming model with temporal semantics.

  3. PRET:Precision Timed Machines Related Work ISA extensions with timing instructions Multithreaded architecture with scratchpad memories and time-triggered access to main memory Simulator accepts programs in C with additional timing instructions. JOP(Vienna), SPEAR(Vienna), KEP(Kiel), REMIC (Auckland) Forbes, Oct. 27, 2008

  4. LabVIEW Actor oriented structured data flow programming language G C software synthesis backend to automatically generate code Has the ability to incorporate legacy C code into a model based design

  5. LabVIEW cont. Timed loops allow the user to specify the period and offset at which functions are to be executed An Automated Mapping of Timed Functional Specification to A Precision Timed Architecture, Forbes

  6. Timed Loop Forbes, Oct. 27, 2008

  7. Plug-in • LabVIEW has a plug-in architecture. • We implemented a plug-in that maps LabVIEW to the PRET architecture. • Implements timed loops with the PRET timing instruction.

  8. Simple mutual exclusion example Producer Observer Consumer

  9. Questions?

  10. Demo

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