1 / 18

Understanding Instruction Pipelining and Branch Prediction Techniques

Explore the intricacies of instruction pipelining, a crucial technique for enhancing CPU performance. This article outlines the stages of pipelining, including fetching, decoding, executing, and writing results, while also addressing the challenges posed by branches in the pipeline. Learn about effective strategies such as branch prediction, loop buffers, and prefetching branch targets. Delve into multiple streams and the significance of managing pipelines to avoid contention issues. Understand how techniques like delayed branching and historical prediction can optimize execution flow in complex programming scenarios.

ifeoma-young
Download Presentation

Understanding Instruction Pipelining and Branch Prediction Techniques

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Pipelining • Fetch instruction • Decode instruction • Calculate operands (i.e. EAs) • Fetch operands • Execute instructions • Write result • Overlap these operations

  2. Two Stage Instruction Pipeline

  3. Timing of Pipeline

  4. Branch in a Pipeline

  5. Six Stage Instruction Pipeline

  6. Alternative Pipeline Depiction

  7. Speedup Factors with Instruction Pipelining

  8. Dealing with Branches • Multiple Streams • Prefetch Branch Target • Loop buffer • Branch prediction • Delayed branching

  9. Multiple Streams • Have two pipelines • Prefetch each branch into a separate pipeline • Use appropriate pipeline • Leads to bus & register contention • Multiple branches lead to further pipelines being needed

  10. Prefetch Branch Target • Target of branch is prefetched in addition to instructions following branch • Keep target until branch is executed • Used by IBM 360/91

  11. Loop Buffer • Very fast memory • Maintained by fetch stage of pipeline • Check buffer before fetching from memory • Very good for small loops or jumps • c.f. cache • Used by CRAY-1

  12. Loop Buffer Diagram

  13. Branch Prediction (1) • Predict never taken • Assume that jump will not happen • Always fetch next instruction • 68020 & VAX 11/780 • VAX will not prefetch after branch if a page fault would result (O/S v CPU design) • Predict always taken • Assume that jump will happen • Always fetch target instruction

  14. Branch Prediction (2) • Predict by Opcode • Some instructions are more likely to result in a jump than thers • Can get up to 75% success • Taken/Not taken switch • Based on previous history • Good for loops

  15. Branch Prediction (3) • Delayed Branch • Do not take jump until you have to • Rearrange instructions

  16. Branch Prediction Flowchart

  17. Branch Prediction State Diagram

  18. Dealing With Branches

More Related