The Processor

1. Chapter 4 The Processor

2. Points to Remember • Chapter 1 explains the performance of Computer is determined by three factors • Instruction Count • Clock Cycle Time • Clock Cycle per Instructions (CPI) • How they impact Performance ?

3. Basic MIPS Implementation • Implementation that includes a subset of the core MIPS instruction set • The memory reference instructions load word (1w) and store word (sw) • The arithmetic logic instructions add, sub, AND, OR and slt • The instructions branch equal (beq) and jump (j)

4. Working of a Program (Orientation Session) • For every Instructions first two steps are identical • Send the Program Counter (PC) to the memory that contains the code and fetch instructions from memory • Read one or two registers using fields of instructions to select the registers to read • After these two steps the action required to complete depend on Instructions Type

5. Working of a Program (Orientation Session) • There are three Instructions Types: • Memory Reference • Arithmetic-Logical • Branches • The simplicity and regularity of MIPS instructions makes it simplify the implementation by making execution of many instructions classes

6. Working of Program

7. Data Path and Clocking • The Path where data is fetched to and from memory and Registers for processing is termed as Data path • A Clocking Methodology defines when signals can be read and when they can be written (Else all the circuits would not be able to perform function in Harmony) • So referring to our orientation on the basic concepts What is Integration?

8. Edge Triggered Clocking • This means that any values stored in sequential logic element are updated only at a clock edge • This enables us to read the content of registers, send a value and write to the registers in the same clock cycle • The diagrams given below contrast the two approaches

9. Building a Data Path • Data Path Element: A Unit to operate on or hold data within processor. In MIPS implementation the data path elements include the instructions and data memories, register file the ALU and addresses • Program Counter: The register containing the address of the instructions in the program being executed • Register File: A State element that consists of a set of registers that can be read and written

10. Pipelining • When multiple instructions are overlapped in execution it is called Pipelining • Laundry example explains pipelining • Place dirty cloths into Washer • When finished placed in Dryer • Dryer Finished place on table and Fold • Folding Finished put clothes away • Start with the next Load of Dirty Clothes • EXECUTION IN A SEQUENCE WILL BE NON PIPELINING

11. Non Pipelining vs Pipelining

12. Applying the principle in Program Execution • 1. Fetch instruction from memory • 2. Read Registers while decoding the instruction • 3. Execute operation or calculate an address • 4. Access an operand in Data Memory • 5. Write Results to the Register

13. Pipeline in clock cycle • If we take multiple clock cycles for all the above operations, we can’t achieve performance • Hence, Pipelining must be achieved within a single clock cycle. • If the stages are perfectly balanced then time between instructions o the pipelined processor is equal to

14. Hazards • The situation when a pipeline cannot execute in a clock cycle is called Hazard • Three Types of Hazards • Structural: When an instruction cannot execute in a Clock Cycle because of limitations in Hardware • Data: When an instructions cannot execute in a Clock Cycle because Data Required is not available • In order to resolve Data Hazard method called Forward Bypassing is Used • This is done by retrieving the missing data element from internal buffers rather waiting for it from Programmers defined Memory or Registers

15. Control or Branch Hazard • The third type of Hazard is called control when Instruction fetched during pipelining is not what is required or is not some thing expected • A Stall occurs when a Control Hazard is arrived • Resolution is to become sequential again until right instructions comes • A more sophisticated method is branch prediction which means moving forward based on assumptions rather waiting for the actual right instruction

16. Exception Handling • Exceptions are events that change the normal flow of the program other than the branch instructions • They are also known as interrupts and they stop program flow and are unscheduled • Interrupt in its strict definition remains an event that has occurred outside processor disrupting program flow, however generally the term exception and interrupt are used interchangeable

17. Exception Handling thorugh EPC • Basic action for any exception handling is that processor must know the address of instructions that has caused an exception • The address is saved in register called EPC (Exception Program Counter) • Based on EPC’s address, Operating System is asked to take appropriate action as per predefined implementation

18. Exception Handling through Vector Interrupt • The address to which control is transferred is determined by the cause of exception • For example an overflow while adding two numbers is an exception and what needs to be done after over flow has occurred, will lead us to actual numbers that have caused overflow • In pipelines Exception are treated as Control Hazard and rectified in the same manner