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LOGIC DESIGN. APPLICATIONS OF BOOLEAN ALGEBRA. EE410. Ertuğrul Eriş. 1. EE33201 COURSE ASSESMENT MATRIX. BINARY BOOLEAN ALGEBRA APPLICATIONS. BINARY BOOLEAN ALGEBRA S={0,1} Alll the functions are Boolean then represented as formulas. PROPOSITIONS ALGEBRA (Önermeler Cebri)

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logic design

LOGIC DESIGN

APPLICATIONS OF BOOLEAN ALGEBRA

EE410

Ertuğrul Eriş

Ertuğrul Eriş

1

binary boolean algebra applications
BINARY BOOLEAN ALGEBRA APPLICATIONS
  • BINARY BOOLEAN ALGEBRA S={0,1}
    • Alll the functions are Boolean then represented as formulas.
  • PROPOSITIONS ALGEBRA (Önermeler Cebri)
  • BINARY LOGIC CIRCUITS
    • Tearnary logic being studied in theory not available in practice
    • Practice/Theory
      • Tearnary could be practical
      • Ternary: there is no boolean algebra for it.

EE410

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3

prepositions algebra nermeler cebr
PREPOSITIONS ALGEBRA(ÖNERMELER CEBRİ )
  • S={D(True, doğru),Y(False,Yanlış)}
  • Preposition
    • Could be true or false
    • Formal logic
  • Operations
    • Propositions could be considered as variables, «AND»,»OR»»NOT» are operations .

‘An Investigation of the Laws of Thought, 1854’ George Boole(1815-1864)

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propositional algebra operations
PROPOSITIONAL ALGEBRAOPERATIONS
  • Boolean Algebra
    • SUM, PRODUCT, COMPLEMENT
  • Propositional Algebra
    • OR, AND, NEGATION
  • SUM, OR corresponds «AND/OR» in Spoken languge

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truth functional propositional logic
TRUTH FUNCTIONAL PROPOSITIONAL LOGIC
  • A propositional function is to be found for a unreliable-run of an elavator system
  • System is unreliable if
    • Elavator runnig, it is empty and not called and/or
    • Elavator runnig, its door is open
    • Variables: U: running elavator; V: empty;

Y:called; Y': not called; z:open door

    • F = UVY'+UZ =U(VY'+Z)

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boolean algebra logic circuits
BOOLEAN ALGEBRA/LOGIC CIRCUITS
  • BOOLEAN ALGEBRA2-ary operations:
      • pruduct, sum
    • 1-ary operation:
      • complement
  • LOGIC CIRCUITS
    • AND, OR,
    • NOT

GATES (KAPILARI)

Interpretation of gates?

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basic logic gates and or not
BASIC LOGIC GATES: AND, OR, NOT

AND

OR

NOT

Comparison of Spoken languge OR and Logic OR.

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gates
GATES

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input output bit streams
INPUT/OUTPUT BIT STREAMS
  • In bit streams:
  • inputs could be repeated
  • inputs could be any order (indeğendent variables)

Input variables:2 x,y

Different inputs: 4

Input stream lenght: 5

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commonly used other gates
COMMONLY USED OTHER GATES

(TÜVE)

(TÜVEYA)

(AYRICALI VEYA)

Gate interpretation

(AYRICALI TÜVEYA)

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multiple input gates
MULTIPLE INPUT GATES

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logic types
LOGIC TYPES
  • Current Logic:
    • no current→ logic 0, current → logic 1
  • Voltage Logic:
      • no current→ logic 0, current → logic 1
  • Positive Logic: 1 in simgelediği gerilim (akım) voltage (current) representing «logic 1>voltage (current) representing «logic 0»
  • Negative Logic:

voltage (current) representing «logic 1<voltage (current) representing «logic 0»

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logic types1
LOGIC TYPES

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fan in fan out g r iki yelpazeler
FAN-IN/FAN-OUT(GİRİŞ/ÇIKIŞ YELPAZELERİ)
  • FAN IN (Giriş yelpazesi )
    • Number of inputs (variables, wires) to a gate.
  • FAN OUT (Çıkış yelpazesi )
    • Maximum number of outputs that could feed different gate inputs.

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co m mercial pac k ages 1
COMMERCIAL PACKAGES-1
  • Have active elements (transistors)
    • All have one Vcc and one ground terminal
  • Two-inputs four gates within a package, total 14 terminals SSI
    • Genellikle 14 bacaklı
  • 3-4-input, 2-3 gates
  • SSI Circuits
  • ÇOK Bacaklı, LSI, VLSI

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co m mercial pac k ages 2
COMMERCIAL PACKAGES-2
  • SSI (Sıngle Scale Integrated Circuits) COMPONENTS
    • Each package includes less than 10 gates
  • MSI (Medium Scale Integrated Circuits) COMPONENTS
      • Each package includes less than 100 gates
  • LSI (Large Scale Integrated Circuits) COMPONENTS
      • Each package includes less than 1000 gates
  • VLSI (Very Large Scale Integrated Circuits) COMPONENTS
      • Each package includes more than 1000 gates

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co m mercial pac k ages 3
COMMERCIAL PACKAGES-3

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logic circuits mantik devreler
LOGIC CIRCUITS(MANTIK DEVRELERİ)
  • LOGIC CIRCUIT:
    • Definite number of elements
    • Two different outputs cannot be connected to the same input (opposite could be true)
    • complete
  • TECHNOLOGY
    • TTL (Transistor-transistor logic)
    • MOS/CMOS(Complementary metal–oxide–semiconductor)

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classification of logic circuits
CLASSIFICATION OF LOGIC CIRCUITS
  • COMBINATIONAL
    • Outputs are determined uniquely once the ,inputs are known.
    • Gate only, no memory elements
    • No feedback
  • SEQUENTIAL
    • Memory and gates elements included
    • Could be feedback

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combinational circuit analysis 1
COMBINATIONAL CIRCUIT ANALYSIS-1
  • Given:
    • Combinational Circuit,
    • Input variables, Independent variables
      • Different inputs
        • If the number of independent variables is n,
        • Number of different input is 2n
      • Input bit stream
        • A sequence of repeatable different inputs
  • To be found:
    • Output, dependent variable
      • Truth Table, Function
      • Output bit stream

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combinational circuit analysis 3
COMBINATIONAL CIRCUIT ANALYSIS-3

Same function in different forms, equivalent functions) means different but equivalent circuits.

Comparison: number of elements, number of diferent type of elements, Levels (delay time), Fan-in’s

Sigle type elements

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combinational circuit analysis 31
COMBINATIONAL CIRCUIT ANALYSIS-3

Two level circuits

SOP (sum of products), POS (Product of sums) two level circuits.

Minimal SOP and POS circuits.

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combinetional circuit synthesis
COMBINETIONAL CIRCUIT SYNTHESIS
  • Given:
    • Truth Table, function
    • Word description (Sözle tanım )
  • To be found
    • Cominational logic circuit which does the given
      • Determination number of input/output variables,
      • Selection of the gate types,
      • Find the topology
  • Solution (could be more than one!)
    • Circuit corresponding to first type canonical form
    • Circuit corresponding to second type canonical form

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combinetional circuit synthesis1
COMBINETIONAL CIRCUIT SYNTHESIS
  • CANONICAL SOP/POS CIRCUITS
  • TWO LEVEL
      • Delay/Response time,
      • frequency/hız
  • FAN-IN
    • Number of input veriables
  • TYPE OF GATES
    • NOT, AND, OR
    • NAND, NOR

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combinetional circuit synthesis2
COMBINETIONAL CIRCUIT SYNTHESIS

Level1 Level2

Level1 Level2

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example
EXAMPLE

f(x1x2x3)

= Σ 5,6,7= x1x'2x3+x1x2x'3+x1x2x3

= Π 0,1,2,3,4

= (x1+x2+x3) (x1+x2+x'3ı (x1+x'2+x3) (x1+x'2+x'3 )(x1+x2+x3

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single type element
SINGLE TYPE ELEMENT
  • Is there a sıngle type of element by which NOT, AND and OR gates realized?
  • Two Solutions
    • NAND
    • NOR
  • Benefit?

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two level nand realisation
TWO LEVEL NAND REALISATION

Level1 Level2

Level1 Level2

Level1 Level2

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slide32

PROGRAM DESIGN

DEPT, PROGRAM

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PROGRAM OUTCOMES

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STATE, ENTREPRENEUR

FIELD

QALIFICATIONS

EU/NATIONAL QUALIFICATIONS

KNOWLEDGE

SKILLS

COMPETENCES

NEWCOMERSTUDENT

ORIENTIATION

GOVERNANCE

Std.

questionnaire

ALUMNI, PARENTS

ORIENTIATION

STUDENT

PROFILE

Std.

questionnaire

FACULTY

NGO

STUDENT,

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CIRCICULUM

???

INTRERNAL CONSTITUENT

Std.

questionnaire

EXTRERNAL CONSTITUENT

EXTRERNAL CONSTITUENT

REQUIREMENTS

EU/NATIONAL

FIELD QUALIFICATIONS

PROGRAM OUTCOMES

QUESTIONNAIRES

QUALITY IMP. TOOLS

GOAL: NATIONAL/INTERNATIONAL ACCREDITION

bloom s taxonomy anderson and krathwohl 2001
BLOOM’S TAXONOMYANDERSON AND KRATHWOHL (2001)

!!Listening !!

Doesn’t exits in the original!!!

http://www.learningandteaching.info/learning/bloomtax.htm

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slide34

ULUSAL LİSANS YETERLİLİKLER ÇERÇEVESİ

BLOOMS TAXONOMY

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course assesment matrix
COURSE ASSESMENT MATRIX

LEARNING OUTCOMES

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