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Stepper Motors

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Stepper Motors

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    1. Stepper Motors more accurately controlled than a normal motor allowing fractional turns or n revolutions to be easily done low speed, and lower torque than a comparable D.C. motor useful for precise positioning for robotics Servomotors require a position feedback signal for control

    2. Stepper Motor Diagram

    3. Stepper Motor Step Angles

    4. Terminology Steps per second, RPM SPS = (RPM * SPR) /60 Number of teeth 4-step, wave drive 4-step, 8-step Motor speed (SPS) Holding torque

    5. Stepper Motor Types Variable Reluctance Permanent Magnet http://www.cs.uiowa.edu/~jones/step/types.html reluctance magnet becomes temporarily magnetized when placed in a magnetic field (http://www.theproductfinder.com/motors/linste.htm) http://www.cs.uiowa.edu/~jones/step/types.html reluctance magnet becomes temporarily magnetized when placed in a magnetic field (http://www.theproductfinder.com/motors/linste.htm)

    6. Variable Reluctance Motors

    7. Variable Reluctance Motors This is usually a four wire motor – the common wire goes to the +ve supply and the windings are stepped through Our example is a 30o motor The rotor has 4 poles and the stator has 6 poles Example Rotor is magnetRotor is magnet

    8. Variable Reluctance Motors To rotate we excite the 3 windings in sequence W1 - 1001001001001001001001001 W2 - 0100100100100100100100100 W3 - 0010010010010010010010010 This gives two full revolutions

    9. Unipolar Motors

    10. Unipolar Motors To rotate we excite the 2 windings in sequence W1a - 1000100010001000100010001 W1b - 0010001000100010001000100 W2a - 0100010001000100010001000 W2b - 0001000100010001000100010 This gives two full revolutions

    11. Basic Actuation Wave Forms

    12. Unipolar Motors To rotate we excite the 2 windings in sequence W1a - 1100110011001100110011001 W1b - 0011001100110011001100110 W2a - 0110011001100110011001100 W2b - 1001100110011001100110011 This gives two full revolutions at 1.4 times greater torque but twice the power When two windings are excited then the magnetic field has more power and since they are 90 degree then the total would be 1.4 times But the power (the current) is doubled When two windings are excited then the magnetic field has more power and since they are 90 degree then the total would be 1.4 times But the power (the current) is doubled

    13. Enhanced Waveforms better torque more precise control

    14. Unipolar Motors The two sequences are not the same, so by combining the two you can produce half stepping W1a - 11000001110000011100000111 W1b - 00011100000111000001110000 W2a - 01110000011100000111000001 W2b - 00000111000001110000011100

    15. Motor Control Circuits For low current options the ULN200x family of Darlington Arrays will drive the windings direct.

    16. Interfacing to Stepper Motors

    17. Example

    18. Digital to Analog Converter

    19. Example – Step Ramp

    20. Analog to Digital

    21. Vin Range

    22. Timing

    23. Interfacing ADC

    24. Example

    25. Temperature Sensor

    26. Printer Connection

    27. IO Base Address for LPT

    28. Printer’s Ports

    29. 8255 8051 has limited number of I/O ports one solution is to add parallel interface chip(s) 8255 is a Programmable Peripheral Interface PPI Add it to 8051 to expand number of parallel ports 8051 I/O port does not have handshaking capability 8255 can add handshaking capability to 8051

    30. 8255 Programmable Peripheral Interface (PPI) Has 3 8_bit ports A, B and C Port C can be used as two 4 bit ports CL and Ch Two address lines A0, A1 and a Chip select CS 8255 can be configured by writing a control-word in CR register

    31. 8255 Control Word

    33. 8255 Operating Modes Mode 0 : Simple I/O Any of A, B, CL and CH can be programmed as input or output Mode 1: I/O with Handshake A and B can be used for I/O C provides the handshake signals Mode 2: Bi-directional with handshake A is bi-directional with C providing handshake signals B is simple I/O (mode-0) or handshake I/O (mode-1) BSR (Bit Set Reset) Mode Only C is available for bit mode access Allows single bit manipulation for control applications

    34. 8255 Mode Definition Summary

    35. Mode 0 Provides simple input and output operations for each of the three ports. No “handshaking” is required, data is simply written to or read from a specified port. Two 8-bit ports and two 4-bit ports. Any port can be input or output. Outputs are latched. Inputs are not latched

    36. Mode 1 Mode 1 Basic functional Definitions: Two Groups (Group A and Group B). Each group has one 8-bit data port and one 4-bit control/data port. The 8-bit data port can be either input or output. Both inputs and outputs are latched. The 4-bit port is used for control and status of the 8-bit data port.

    37. 8255 mode 1 (output)

    38. Mode 1 – Control Signals Output Control Signal Definition OBF (Output Buffer Full F/F). (C7 for A, C1 for B) The OBF output will go “low” to indicate that the CPU has written data out to the specified port. A signal to the device that there is data to be read. ACK (Acknowledge Input). (C6 for A, C2 for B) A “low” on this input informs the 8255 that the data from Port A or Port B has been accepted. A response from the peripheral device indicating that it has read the data. INTR (Interrupt Request). (C3 for A, C0 for B) A “high” on this output can be used to interrupt the CPU when an output device has accepted data transmitted by the CPU.

    39. Timing diagram for mode1(output)

    40. 8255 mode 1 (input)

    41. Mode 1 – Control Signals Input Control Signal Definition STB (Strobe Input). (C4 for A, C2 for B) A “low” on this input loads data into the input latch. IBF (Input Buffer Full F/F) (C5 for A, C1 for B) A “high” on this output indicates that the data has been loaded into the input latch; in essence, an acknowledgement from the 8255 to the device. INTR (Interrupt Request) (C3 for A, C0 for B) A “high” on this output can be used to interrupt the CPU when an input device is requesting service.

    42. Timing diagram for mode1(input)

    43. Mode 2 - Strobed Bidirectional Bus I/O MODE 2 Basic Functional Definitions: Used in Group A only. One 8-bit, bi-directional bus port (Port A) and a 5-bit control port (Port C). Both inputs and outputs are latched. The 5-bit control port (Port C) is used for control and status for the 8-bit, bi-directional bus port (Port A).

    44. Mode 2 Output Operations OBF (Output Buffer Full). The OBF output will go low to indicate that the CPU has written data out to port A. ACK (Acknowledge). A low on this input enables the tri-state output buffer of Port A to send out the data. Otherwise, the output buffer will be in the high impedance state. Input Operations STB (Strobe Input). A low on this input loads data into the input latch. IBF (Input Buffer Full F/F). A high on this output indicates that data has been loaded into the input latch.

    46. BSR Mode If used in BSR mode, then the bits of port C can be set or reset individually

    47. BSR Mode example Move dptr, 0093h Up: Move a, 09h ;set pc4 Movx @dptr,a Acall delay Mov a,08h ;clr pc4 Movx @dptr,a Acall delay Sjmp up

    48. Interfacing 8255 with 8051 CS is used to interface 8255 with 8051 If CS is generated from lets say Address lines A15:A12 as follows, A15:A13 = 110 Address of 8255 is 110 xxxxx xxxx xx00b Base address of 8255 is 1100 0000 0000 0000b=C000H Address of the registers A = C000H B = C001H C = C002H CR = C003H

    49. Interfacing 8255 with 8051

    50. 8255 Usage: Simple Example 8255 memory mapped to 8051 at address C000H base A = C000H, B = C001H, C = C002H, CR = C003H Control word for all ports as outputs in mode0 CR : 1000 0000b = 80H test: mov A, #80H ; control word mov DPTR, #C003H ; address of CR movx @DPTR, A ; write control word mov A, #55h ; will try to write 55 and AA ; alternatively repeat:mov DPTR,#C000H ; address of PA movx @DPTR, A ; write 55H to PA inc DPTR ; now DPTR points to PB movx @DPTR, A ; write 55H to PB inc DPTR ; now DPTR points to PC movx @DPTR, A ; write 55H to PC cpl A ; toggle A (55?AA, AA?55) acall MY_DELAY ; small delay subroutine sjmp repeat ; for (1)

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