Understanding SimpleCPU & SSCPU Architectures for Efficient Programming

1. Today’s Class • Instruction Set Architectures (ISAs) • SimpleCPU architecture • SimpleCPU programming • SSCPU architecture • SSCPU programming, if time R. Smith - University of St Thomas - Minnesota

2. Parts of an ISA • General: the elements of the computer that matter to machine langugage programming • Instructions (operations) available • Amount of RAM a program can use • Local storage (registers) • How to construct instructions • How to manage instruction flow • Jumps, subroutines, conditionals, etc. R. Smith - University of St Thomas - Minnesota

3. Not your grandfather’s laptop. The inspiration for the Simple CPU Built in 1955-56 by MIT’s Lincoln Laboratory Absurdly simple instruction set Focus on testing the transistorized computer circuits Easier to build, easier to test, easier to fix The TX-0 R. Smith - University of St Thomas - Minnesota

4. Programming the SimpleCPU • “One address” instructions • “Accumulator” for arithmetic • 100 words of RAM • Instruction format: • Including memory address: • 1 digit “operation” and 2 digits “address” • No memory address • 0, 0, then 1 digit “operation” R. Smith - University of St Thomas - Minnesota

5. ISA Implementation pieces • Programmer usable things • Instructions • Registers, like the “Accumulator” AC • Program Counter, affected through “Jumps” • CPU Things • Program Counter (PC) – points to next instruction • Instruction Register (IR) – what we’re doing right now • Memory Control Registers • MAR – Memory Address Register – where we’re working • MDR – Memory Data Register – the data for that location • Write flag – True if we’re writing the location R. Smith - University of St Thomas - Minnesota

6. How it Works • First Cycle: Fetch • Current Program Counter (PC) goes to MAR • RAM puts the contents of that location in MDR • Contents of MDR is copied to Instruction Register (IR) • Second Cycle: Execute • The contents of the IR decide what to do • Make the change at the end of the cycle • For “address” instructions, copy address from IR • When done, add 1 to the PC (unless it’s a JUMP) R. Smith - University of St Thomas - Minnesota

7. The “Address” Instructions • “Load” Instruction • Copy the address from the IR to the MAR • At the end of the cycle, Copy the MDR to the AC • “Store” Instruction • Copy address from IR to MAR • Copy data from AC to MDR; Say “Write” • At end of cycle, RAM updates • “Jump” Instruction • Copy the address from the IR to the PC R. Smith - University of St Thomas - Minnesota

8. Instruction Set R. Smith - University of St Thomas - Minnesota

9. Writing a Program • Example: Subtract 3 from 5 • Starting RAM contents: • 3 stored in RAM location 10 • 5 stored in RAM location 11 • Example: Add 3 to the AC, store the result in RAM location 12, then repeat, adding 3 each cycle through. Starting RAM contents: • 3 stored in RAM location 10 R. Smith - University of St Thomas - Minnesota

10. Simple CPU R. Smith - University of St Thomas - Minnesota

11. SimpleCPU / SSCPU • SimpleCPU ISA • “Micro Architecture” for SimpleCPU • Writing a program for SimpleCPU • SSCPU – an ‘improved’ version • Micro-architecture • Writing a program R. Smith - University of St Thomas - Minnesota

12. SSCPU Version: Fetch Cycle R. Smith - University of St Thomas - Minnesota

13. SSCPU: Execute Cycle R. Smith - University of St Thomas - Minnesota

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