Modular SOC Testing With Reduced Wrapper Count

1. Modular SOC Testing With Reduced Wrapper Count Qiang Xu; Nicolici, N., “Modular SOC testing with reduced wrapper count”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Dec. 2005, Page(s): 1894- 1908. Presented By: Yuyan Xue (April. 2007)

2. Motivation • Modular test strategies (Wrapper, dedicated bus-based TAM) enable the reusability, scalability and interoperability in DFT. • Modular test strategies add the overall cost of the test. • Modular test strategies deteriorate the system performance if they stand on the critical path. Reduced-Wrapper-Count Testing

3. Objective • Reduce the wrapper count, meanwhile maintaining the benefits of modular SOC testing. • Compatible to IEEE P1500 standard, meanwhile investigate the suitability of reusing the functional interconnect for transferring test data Reduced-Wrapper-Count Testing

4. Idea from IEEE P1500 • INTEST/EXTEST • Producer/Consumer • A core can be tested without wrapping its terminals as long as all its producers and consumers are P1500-wrapped. Reduced-Wrapper-Count Testing

5. New Wrapper Design for Embedded Cores No wrapper at all (INTEST/EXTEST modes only) Light wrapper without WBR (RAM/ROM for BIST) Parallel Bypass Register (WBY) Revised P1500 Wrapper for P/C cores. Reduced-Wrapper-Count Testing

6. New Test Conflicts Caused • Traditional TAM lines conflict in IEEE P1500 • New test conflicts • Producer-CUT • Core6->2,5,9 • CUT-Consumer • Core2->6,7,8,9 • Shared-Producer • Core7,8->2 • Shared-Consumer • Core3,6->5 • Shared-Bus • Core1,5->8 Reduced-Wrapper-Count Testing

7. TAM Division Into Three Groups • Flexible-width test for GCUT • Daisy chain for Gprod and Gcons Reduced-Wrapper-Count Testing

8. Wrapper/TAM Co-optimization • Given: PIs, POs, bidirectional I/Os, test patterns, scan chains and scan chain length, total TAM width, wrapper design constrains • Output: the width of each TAM group, wrapper design for each core, the test schedule • Satisfy: wrapper design constrains, maximized light-wrapper number, TAM width constrains, minimized overall SOC TAT Reduced-Wrapper-Count Testing

9. Three Types of Wrapper Design Constraints • Critical Path -> Light wrapper • Cores with P1500 wrapper provided • Two-pattern tested ( delay and stuck-open fault) Reduced-Wrapper-Count Testing

10. TAM Division and Test Scheduling Algorithm • Determine light-wrapped cores <-functional interconnection & wrapper design constraints • Create Test Incompatible Graph (TIG) • Enumeratively find the optimal TAM division and the minimum system TAT. • Worst case complexity Reduced-Wrapper-Count Testing

11. Decide Wrapper Type • Given: the set of cores, the functional interconnect relationship, wrapper design constrains • Output: wrapper type for each core • Methodology: • Wrapper status initialization ( wrapper constraints) • Light-wrapped as default and compute test dependency. • Choose cores with less test dependency Reduced-Wrapper-Count Testing

12. Construct TIG • Given: the set of cores, test conflicts • Output: node for core and edge for conflicts between two cores • Conflicts only exist between: • Two light-wrapped cores • A Light-wrapped core and its producers/consumers Reduced-Wrapper-Count Testing

13. Dynamic Rectangle Representation • Rectangle representation for P1500-wrapped core • Rectangle representation for light-wrapped core Reduced-Wrapper-Count Testing

14. Adaptive Dynamic Rectangle Packing • Given: the set of cores, TIG, TAM division • Output: schedule for each core, overall TAT of the SOC • Methodology: • Find out pareto-optimal TAM width • Schedule cores using the preferred width, as long as TAM width is sufficient • Pack the idle time with remaining test • Repeat scheduling process for remaining test if one test is completed Reduced-Wrapper-Count Testing

15. Experimental Result Reduced-Wrapper-Count Testing

16. Experimental Result (Continued) Reduced-Wrapper-Count Testing

17. Contributions • Light-wrapped core is introduced to reduce the number of wrapper cells in the SOC without impacting its testability. Up to half of the cores can be unwrapped without affecting the test quality. • New modular SOC test architecture is proposed, which employs three separate TAM groups and facilitates concurrent testing of both P1500-wrapped cores and light-wrapped cores. • New algorithms for wrapper/TAM co-optimization and test scheduling is introduced. Reduced-Wrapper-Count Testing