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Prime Indicants: A Synthesis Method for Indicating Combinational Logic Blocks Will Toms School of Computer Science University of Manchester. Process Variation. Process Variation at 45nm: Transistor Delay: 20-23% Interconnect Delay: 10%

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slide1
Prime Indicants: A Synthesis Method for Indicating Combinational Logic BlocksWill TomsSchool of Computer ScienceUniversity of Manchester
process variation
Process Variation
  • Process Variation at 45nm:
    • Transistor Delay: 20-23%
    • Interconnect Delay: 10%
  • Self-Timed circuits more robust to variations in propagation delay
    • No external timing assumptions
  • Indication - status of internal signals can be determined by the outputs of the gates
indicating combinational logic
Indicating Combinational Logic
  • Validity must be encoded into the datapath
    • DI (unordered) encoding (dual-rail/m-of-n)
    • Each data word transmitted explicitly
    • Need to return to known state (Four-phase/RTZ)
  • Functions difficult to specify:
    • Functions completely specified
    • All minterms must be enumerated
  • Impractical for large datapath operations
desynchronisation
Desynchronisation
  • Can construct large indicating datapaths from synchronous circuits by expanding gates into dual-rail equivalents
desynchronisation1
Desynchronisation
  • Desynchronised networks can be optimised by reducing indication:
    • Relaxation (Jeong, Zhou):
      • Removing redundant indication (fanout of gates)
    • Relative-Timing (Chelcea):
      • Applying timing constraints to avoid indication
    • Validity (NCL-X):
      • Adding additional signals for indication
desynchronisation2
Desynchronisation
  • Properties of self-timed datapaths differ from conventional datapaths:
    • Invertions are free (in 1-of-N codes)
    • N-input complex gates (approximately) same cost as N-input simple gate
  • Mapping desynchronised networks to DI-codes other than dual-rail (possibly 1-of-4) expensive
block level approach
Block-Level Approach
  • Self-timed datapaths constructed from complex function-blocks:
    • Small blocks consisting of up to 10 binary inputs and outputs
block level approach1
Block-Level Approach
  • Existing optimisations applied between function blocks
  • Distribute indication between the outputs of function blocks
  • Can use any encoding between function blocks
block level approach2
Block-Level Approach
  • How to synthesise arbitrary indicating function blocks?
indication
Indication
  • In four-phase indicating logic, transitions between spacer and data-values form allowed-transition sets (ATS):
    • Each ATS describes all the possible states of the inputs (or outputs) within the transition

0000  0101 = {0000,0100,0001,0101}

indication1
Indication
  • The adjacent transitions of an ATS are the states distance 1 from final state
    • Each adjacent transition has an associated variable ε that transitions

0000  0101 = {0100(x4),0001(x2)}

  • Function f indicates the input transitions of an ATS if for each adjacent transition f is dependent on variable ε

f(ε=0) ≠ f(ε=1)

indication2
Indication
  • In order for a function block to be indicating for each adjacent transition in each ATS, at least one output function must be dependent on variable ε
  • Checking Indication is expensive:
    • 8 input/8 output-function block has 256 ATS each with 8 adjacent transitions = 16,384 (256*8*8) dependency checks to verify an implementation
indication architecture
Indication Architecture
  • Need an architecture that is correct by construction
  • Implement each output function as a sum-of-products where each product is given by ε(a,b) (the inputs that transition in ATS (a-b))
  • Each product implemented by a C-element to cover return-to-zero transitions
indication architecture1
Indication Architecture
  • Each term ε(a,b) is mutually-exclusive and so function indicates all of its input transitions.

a0

C

C

b0

ci0

f

a0

C

b1

ci1

indication architecture2
Indication Architecture
  • Large
  • Slow
  • As function block has several outputs, the number of outputs that indicate each transition is often >1
  • Can optimise architecture by reducing the number of outputs that indicate each input transition
prime implicants
Prime Implicants
  • Implicant of a function, f, is a function p where:

p f

  • A Prime Implicant is an implicant not contained in any other
  • Minimum cost Sum-of-Products implementation must always consist of a sum of prime implicants
prime implicants1
1

0

1

0

100

110

0

010

0

0

0

000

0

0

101

1

1

111

001

1

1

0

011

0

_

_

f = x1x2x3 + x1x2x3 + x1x2x3

Prime Implicants
  • Prime Implicants generated from minterms by consensus:

f = x1x2 + x2x3

prime implicants2
Prime Implicants
  • Function constructed by minimum cost covering of prime implicants
    • Unate Covering Problem (UCP)
optimisation of indicating logic
Optimisation of Indicating Logic
  • Removing literals from function terms reduces indication
  • Optimising one function can prevent further optimisations of other functions
    • Need to consider all functions together
  • May not be possible to construct indicating solution from prime implicants
optimisation of indicating logic1
Optimisation of Indicating Logic
  • Two phase approach:
  • Construct minimum cost indicating cover for each function
  • Determine un-indicated input transitions and reduce existing function terms to cover them
indicant
Indicant
  • In indicating function terms have two roles:
    • Implicate AND Indicate
  • An indicant is an implicant that indicates the transitions on its literals
  • The indicants of a function must be mutually-exclusive
  • A function block constructed from indicant covers of its functions will indicate all internal transitions and some input transitions
    • Minimum cost implementation of Function Block
indicant cover
Indicant Cover
  • Construct the lowest cost mutually-exclusive cover for each function
  • Unate Covering Problem:
    • Determine prime implicants of each function
    • Enumerate all the expanded implicants
    • Determine non-overlapping cover
unindicated inputs
Unindicated Inputs
  • Can easily determine unindicated input transitions
    • Literals not present in the indicants of any function
  • Reduce Indicants by re-inserting the literals
    • Partitions Indicant into multiple indicants
    • All functions must remain unate
  • Need to ensure that new indicants:
    • Cover exactly the same minterms
    • Are mutually-exclusive
unindicated literals
Unindicated Literals
  • Indicant a0 covers 6 minterms:

a0b0c0, a0b0c1, a0b0c2, a0b1c0, a0b1c0, a0b1c1, a0b1c2

  • Reducing by literal b0 results in two indicants

a0b0: {a0b0c0, a0b0c1, a0b0c2}

a0b1: {a0b1c0, a0b1c1, a0b1c2}

  • Reducing by literal c0 results in three indicants

a0c0: {a0b0c0, a0b1c0}, a0c1: {a0b0c1, a0b1c1}

a0c2: {a0b0c2, a0b1c2}

unindicated literals1
Unindicated Literals
  • Reducing the indicants by more than one literal multiplies the number of indicants
  • Reducing Indicant a0 by b0and c0 gives 6 indicants:

a0b0c0, a0b0c1, a0b0c2, a0b1c0, a0b1c0, a0b1c1, a0b1c2

unindicated literals2
Unindicated Literals
  • Use UCP to determine the lowest cost reductions that will cover all of the unindicated inputs
  • Cost of a reduction can change depending on selection of other reductions
    • Eliminates several reduction strategies
  • But distributes the reductions between functions
offset optimisation
Offset Optimisation
  • Initial function implementations use C-elements
  • Can distribute the indication of the RTZ transitions throughout the indicants
  • Can use conventional UCP
  • A range of strategies introduced that target generalised C-elements or AND-gates
results
Results
  • Use clustering algorithm to create suitable-sized function blocks from ISCAS Benchmarks
  • Results show the effectiveness of optimisation
    • Literal Count
  • Not a direct comparison with desynchronisation techniques
    • Techniques fit into desynchronisation framework
results1
99.1%Results

Approx Equal Literal Count

Significantly Reduced

summary
Summary
  • Developed new technique to synthesis arbitrarily encoded indicating function blocks
  • Large reduction in literal count over initial specification
  • Can be employed within desynchronisation framework
verdad
VERDAD
  • New project to look at incorporating verification techniques in self-timed synthesis operations
    • Inconjunction with Newcastle University.
    • Funded by EPSRC
  • PhD Studentship available
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