1 / 47

CMPS 255 Computer Architecture

CMPS 255 Computer Architecture. Introduction to MIPS assembler, operations & operands of computer hardware, signed and unsigned numbers, Instruction representation, etc. Reference 2.1, 2.2, 2.3, 2.4, 2.5, appendix A. Fetch. Exec. Decode. Review: Execute Cycle.

floridar
Download Presentation

CMPS 255 Computer Architecture

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. CMPS 255Computer Architecture Introduction to MIPS assembler, operations & operands of computer hardware, signed and unsigned numbers, Instruction representation, etc. Reference 2.1, 2.2, 2.3, 2.4, 2.5, appendix A

  2. Fetch Exec Decode Review: Execute Cycle • The datapath executes the instructions as directed by control • Memory stores both instructions and data Devices Processor Network Control 00000000100 000100001000000100000 Memory Input Datapath contents Reg #4 ADD contents Reg #2 results put in Reg #2 Output

  3. Instruction Set • To command a computer’s hardware, you must speak its language • Instruction set: The vocabulary of commands understood by a given hardware architecture. • an abstract interface between the hardware and the lowest level of software of a machine. • Contains everything needed to write a machine language program including: Instructions, registers, memory access, I/O, etc. • Different computers have different instruction sets (MIPS, ARM, Intelx86) , but with many common aspects • all computers are constructed from hardware technologies based on similar underlying principles • there are a few basic operations that all computers must provide • Designers goal : find a language that makes it easy to build the hardware and the compiler while maximizing performance and minimizing cost and energy.

  4. MIPS Instruction Set • MIPS ISA is used throughout in this course • StanfordMIPScommercialized by MIPS Technologies, • Elegant example of the instruction sets designed since the 1980s. • Typical of many modern ISAs because of its simplicity. • See MIPS Reference Data tear-out card, and Appendixes A and E • Stored program concept • instructions and data of many types can be stored in memory as numbers

  5. The Four Design Principles • Simplicity favors regularity. • Smaller is faster. • Make the common case fast. • Good design demands good compromises.

  6. MIPS Arithmetic • All arithmetic operations have this form: C code: a = b + c + d + e; • MIPS code: add a, b, c # The sum of b and c is placed in a • add a, a, d # The sum of b, c, and d is now in a • add a, a, e # The sum of b, c, d and e is now in a • Each instruction performs one operation and requires exactly three operands: two sources and one destination. • conforms to the philosophy of keeping the hardware simple because hardware for a variable number of operands is more complicated. • Design Principle 1: simplicity favors regularity. • Regularity makes implementation simpler • Simplicity enables higher performance at lower cost • it takes three instructions to sum the four variables • Hash (#) is used for MIPS comments: anything from hash mark to end of line will be ignored

  7. MIPS Arithmetic • Example 1: Compiling Two C Assignment Statements into MIPS. • C code: a = b + c; • d = a - e; • The translation from C to MIPS assembly language instructions is performed by the compiler. • MIPS code: add a, b, c • sub d, a, e • Example 2: Compiling a Complex C Assignment into MIPS. • C code: f = (g + h) - (i + j); • Compiled MIPS code. • add t0, g, h # temp t0 = g + h • add t1, i, j # temp t1 = i + j • sub f, t0, t1 # f = t0 - t1

  8. Register Operands • Arithmetic instructions use register operands • MIPS has a 32 × 32-bit register file • Limited number of registers with limited size: 32 registers each is 32 bits. • Design Principle 2: Smaller is faster • very large number of registers may increase the clock cycle time • Registers are numbered 0 to 31 and used for frequently accessed data • group of 32 bits is called a “word” • MIPS assembler convention : use two-character names following a dollar sign to represent a register • $t0, $t1, …, $t9 for temporary values • $s0, $s1, …, $s7 for saved variables

  9. Register Operands • C code: f = (g + h) - (i + j); • variables f, g, h, i, and j are assigned to the registers $s0, $s1, $s2, $s3, and $s4, respectively • Compiled MIPS code. • add $t0, $s1, $s2# register$t0 containsg + h • add $t1, $s3, $s4 # register$t1 containsi + j • sub $s0, $t0, $t1 # f gets $t0 – $t1, which is (g + h)–(i + j)

  10. Summary of MIPS Arithmetic Instruction • MIPS assembly language arithmetic statement add $t0, $s1, $s2 sub $t0, $s1, $s2 • Each arithmetic instruction performs only one operation • Each arithmetic instruction specifies exactly three operands destination  source1 op source2 • Operand order is fixed (the destination is specified first) • Syntax is rigid: 1 operator, 3 operands • Why? Keep Hardware simple via regularity • The operands are contained in the datapath’sregister file ($t0, $s1, $s2) 10

  11. MIPS Register File • The 32 general-purpose registers are stored in register file. • Any register can be read or written by specifying its number in the file. • Most instructions have three register operands (R-format, seen later): • For each Instruction, we need to: • Read two data words from the register file • Write one data word into the register file • To read a data word from the register file, we need: • Input port to the register file that specifies the register number • Output port from the register file that will carry the value that has been read • To write a data word to the register file, we need: • Input port to specify the register number to write to • Another Input port to supply the data to be written into the register • Register file outputs the contents of whatever register numbers are on the read register inputs add $s0, $t0, $s3

  12. Register File 5 5 5 32 32 32 src1 addr src1 data src2 addr 32 locations dst addr src2 data write data 32 bits MIPS Register File • Then a register file needs: • Four input ports: three for register numbers and one for data • Two output ports: both for data • Registers are • Fast • Smaller is faster & Make the common case fast • Easy for a compiler to use • e.g., (A*B) – (C*D) – (E*F) can do multiplies in any order 25 = • Improves code density • Since register are named with fewer bits than a memory location

  13. Naming Conventions for Registers 0 $zero constant 0 (Hdware) 1 $at reserved for assembler 16 $s0 callee saves . . . (caller can clobber) 23 $s7 2 $v0 expression evaluation & 3 $v1 function results 24 $t8temporary (cont’d) 25 $t9 Registers 4 $a0 arguments 5 $a1 6 $a2 7 $a3 26 $k0 reserved for OS kernel 27 $k1 R0 - R31 28 $gp pointer to global area 29 $sp stack pointer 30 $fp frame pointer 8 $t0 temporary: caller saves . . . (callee can clobber) 15 $t7 PC 31 $ra return address HI LO • In addition to the 32 registers, there are three more registers (elaborated later) • PC: A program counter is a register that contains the address (location) of the instruction being executed at the current time • HI and LO: 2 registers that hold results for integer multiplication and division.

  14. Registers vs. Memory • Arithmetic instructions operands must be in registers • only thirty-two registers are provided • Compiler associates variables with registers Devices Processor Network Control Memory Input Datapath Output What about programs with lots of variables?

  15. Memory Operands • Simple variables contain single data elements • Composite data (Arrays, structures, dynamic data) can contain more data elements than the available registers. • How can a computer represent and access such large structures? • Processor can keep only a small amount of data in registers, but computer memory contains billions of data elements. • Hence, data structures (arrays and structures) are kept in memory, Data transfer instructions • MIPS instructions that transfer data between memory and registers. • To access a word in memory, the instruction must supply the memory address • Loadinstruction : copies data from memory to a register. • Storeinstruction : copies data from a register to memory 15

  16. Memory Organization • Viewed as a large, single-dimension array, with an address. • address is an index into the array (Memory[2] is 10) • "Byte addressing" means that the index points to a byte (i.e. 8 bits) of memory. • Bytes are nice, but most data items use larger "words" • For MIPS, a word is 32 bits or 4 bytes. • Since MIPS addresses each byte, word addresses are multiples of 4: there are 4 bytes in a word • 232 bytes with byte addresses from 0 to 232-1 • 230 words with byte addresses 0, 4, 8, ... 232-4

  17. 32 32 32 Processor – Memory Interconnections • Memory is a large, single-dimensional array • An address acts as the index into the memory array The word address of the data Memory read addr/ write addr Processor ? locations read data 232 Bytes(4 GB)230 Words (1 GW) write data 10 8 101 4 1 0 The data stored in the memory 32 bits = 4 Bytes = 1 Word

  18. Store (to) Load (from) Components of any Computer • Registers are in the datapath of the processor; if operands are in memory, we must transfer them to the processor to operate on them, and then transfer back to memory when done. Computer Processor Memory Devices Input Control (“brain”) Datapath Registers Output

  19. Memory Operand Example • EX1: C code: g = h + A[8]; • g in $s1, hin $s2, base address of Ain $s3 • Compiled MIPS code: • Index 8 requires offset of 32 (which is 8*4 because 4 bytes per word) lw$t0, 32($s3) # load word A[8] from memory to $t0 add $s1, $s2, $t0 # add h (in $s2) to A[8] (in $t0) and put the result in $S1 base register offset • offset : constantin a data transfer instruction (8 in our example) • base register: register added to form the address ($s3 in our example) • EX2: C code: A[12] = h + A[8]; • hin $s2, base address of A in $s3 • Compiled MIPS code: lw$t0, 32($s3) # load word add $s1, $s2, $t0 sw $S1, 48($s3) # store word

  20. Accessing Memory • MIPS has two basic data transfer instructions for accessing memory (assume $s3 holds 2410) lw $t0, 32($s3) #load word from memory sw $t0, 48($s3) #store word to memory • The data transfer instruction must specify • where in memory to read from (load) or write to (store) – memory address • where in the register file to write to (load) or read from (store) – registerdestination (source) • The memory address is formed by summing the constant portion of the instruction and the contents of the second register Data flow 56? Data flow 72?

  21. . . . 0 1 1 0 24 Memory . . . 0 1 0 1 20 . . . 1 1 0 0 16 . . . 0001 . . . 0 0 0 1 12 . . . 0 0 1 0 8 . . . 1 0 0 0 4 . . . 0 1 0 0 0 32 bit Data Word Address MIPS Memory Addressing • The memory address is formed by summing the constant portion (offset) of the instruction and the contents of the second (base) register • offset is generally used in accessing elements of array or structure • base register points to beginning of array or structure lw $t0, 4($s3) #what? is loaded into $t0 sw $t0, 8($s3) #$t0 is stored where? $s3 holds 8 . . . 0001 in location 16

  22. . . . . . . A[3] $s3+12 A[2] $s3+8 A[1] $s3+4 A[0] $s3 Compiling with Loads and Stores • Assuming variable b is stored in $s2 and that the base address of array A is in $s3, what is the MIPS assembly code for the C statement A[8] = A[2] - b lw $t0, 8($s3) sub $t0, $t0, $s2 sw $t0, 32($s3)

  23. . . . . . . A[3] $s4+12 A[2] $s4+8 A[1] $s4+4 A[0] $s4 Compiling with a Variable Array Index • Assuming that the base address of array Ais in register $s4, and variables b, c, and i are in $s1, $s2, and $s3, respectively, what is the MIPS assembly code for the C statement c = A[i] - b add $t1, $s3, $s3 #array index i is in $s3 add $t1, $t1, $t1 #temp reg $t1 holds 4*i add $t1, $t1, $s4 #addr of A[i] now in $t1 lw $t0, 0($t1) sub $s2, $t0, $s1

  24. Byte Order • loador store word instruction uses only one memory address • Memory is byte-addresseable: each address stores one byte. • How a word is addressed? • To store a 32 bit word in memory, we split it into 4 bytes (example: 0x12345678) that will occupy a block of four contiguous bytes in memory • Lowest memory address of the four bytes is used to address the word • Assume that the word 0x12345678 is stored at address 0x00400000. • The most significant byte is 0x12; the least significant is 0x78 • There are two ways to store this in memory • Big Endian Byte Order: The most significant byte (the "big end") of the data is placed at the byte with the lowest address. • Little Endian Byte Order: The least significant byte (the "little end") of the data is placed at the byte with the lowest address. • MIPS is in the big-endian camp

  25. Registers vs. Memory • Registers are faster to access than memory • Operating on memory data requires loads and stores • More instructions to be executed • Compiler must use registers for variables as much as possible • Only spill to memory for less frequently used variables • spilling registers : The process of putting less commonly used variables (or those needed later) into memory • Register optimization is important!

  26. Dealing with Constants • Small constants are used quite frequently (50% of operands in many common programs) e.g., A = A + 5; B = B + 1; C = C - 18; • Solutions? Why not? • Put “typical constants” in memory and load them • Create hard-wired registers (like $zero) for constants like 1, 2, 4, 10, … • How do we make this work? • How do we Make the common case fast !

  27. Constant (or Immediate) Operands • Include constants inside arithmetic instructions • Much faster than if they have to be loaded from memory (they come in from memory with the instruction itself) • MIPS immediate instructions addi $s3, $s3, 4 #$s3 = $s3 + 4 • There is no subiinstruction, can you guess why not? • Just use a negative constant addi $s2, $s1, -1

  28. Register $zero • One particular immediate, number zero (0) appears very often in code. • Define register zero ($0 or $zero) to always have constant value 0; • Cannot be overwritten • Useful for common operations (E.g., move between registers) add $t2, $s1, $zero f = g; (in C) where MIPS registers $t2,$s1 are associated with variables f, g • defined in hardware, so an instruction add $zero,$zero,$s0 will not do anything!

  29. MIPS Instructions, so far

  30. Unsigned Binary Integers • Humans think in base 10, but numbers may be represented in any base. For example, 12310 (123 base 10) = 11110112 (1111011 base 2) • In any number base, the value of ith digit d is: • where istarts at 0 and increases from right to left • In base 2, all information is composed of binary digits or bits: can be one of two values, 1 or 0 • Alternatives : high or low, on or off , true or false, etc. • Given an n-bit number • Range: 0 to +2n – 1 • Example : 0000 0000 0000 0000 0000 0000 0000 10112 = 0 + … + 1×23 + 0×22 +1×21 +1×20 = 0 + … + 8 + 0 + 2 + 1 = 1110 • Using 32 bits : 0 to +4,294,967,295

  31. Hexadecimal (base 16) versus Binary • The hexadecimal-binary conversion table. Just replace one hexadecimal digit by the corresponding four binary digits, and vice versa. If the length of the binary number is not a multiple of 4, go from right to left. 00 00 00 0bhex 0X00 00 00 0b • Example: eca8 6420 • 1110 1100 1010 1000 0110 0100 0010 0000

  32. Unsigned Binary Representation For 32 bits 1 1 1 . . . 1 1 1 1 bit 1 0 0 0 . . . 0 0 0 0 - 1 232 - 1 For 4 bits 1 1 1 1 bit 1 0 0 0 0 - 1 24 - 1

  33. 2s-Complement Signed Integers • Using 32 bits : bit 31 is sign bit (1 for negative numbers and 0 for non-negative) • The positive half of the numbers (231 – 1) use the same representation as before • The following bit pattern (1000 . . . 0000two) represents the most negative number -2,147,483,648ten(231); followed by a declining set of negative numbers • Two’s complement does have one negative number, - 2,147,483,648ten, that has no corresponding positive number.

  34. 2s-Complement Signed Integers • Given an n-bit number • Range: –2n – 1 to + 2n – 1 – 1 • –(–2n – 1) can’t be represented (in case of 32 bits, 231 is not represented) • Using 32 bits : ––231to + 231– 1 (from 2,147,483,648 to +2,147,483,647) • Example : 1111 1111 1111 1111 1111 1111 1111 11002 = –1×231 + 1×230 + … + 1×22 +0×21 +0×20 = –2,147,483,648 + 2,147,483,644 = –410

  35. 2s-Complement Signed Integers • Non-negative numbers have the same unsigned and 2s-complement representation • Some specific numbers • 0: 0000 0000 … 0000 • –1: 1111 1111 … 1111 • Most-negative: 1000 0000 … 0000 • Most-positive: 0111 1111 … 1111

  36. Signed Negation • Complement and add 1: complement means 1 → 0, 0 → 1 • Example : using 4 bits • Example: negate +2 • using 4 bits • using any n bits • +2 = 00102 • –2 = 11012 + 1= 11102 • +2 = 0000 0000 … 00102 • –2 = 1111 1111 … 11012 + 1 = 1111 1111 … 11102 • Representing a number using more bits • Replicate the sign bit to the left • Examples: 4-bit to 16-bit +2: 0010 => 0000 0000 0000 0010 –2: 1110 => 1111 1111 1111 1110

  37. complement all the bits 0101 1011 and add a 1 and add a 1 0110 1010 complement all the bits Review: Signed Binary Representation -23 = -(23 - 1) = 23 - 1 =

  38. 000000 10001 10010 01000 00000 100000 op rs rt rd shamt funct Machine Language - Arithmetic Instruction • Instructions, like registers and words of data, are also 32 bits long • Example: add $t0, $s1, $s2 registers have numbers $t0=$8,$s1=$17,$s2=$18 • R-type Instruction Format (R for register): Can you guess what the field names stand for?

  39. op rs rt rd shamt funct MIPS R-format Instruction Fields • op • rs • rt • rd • shamt • funct 6 bits 5 bits 5 bits 5 bits 5 bits 6 bits = 32 bits opcode indicating operation to be performed address of the first registersource operand address of the second registersource operand theregisterdestinationaddress shiftamount (for shift instructions) function code that selects the specific variant of the operation specified in the opcode field

  40. 23hex 18 8 24 100011 10010 01000 0000000000011000 op rs rt 16 bit number Machine Language - Load Instruction (I-type) • Consider the load-word and store-word instr’s • What would the regularity principle have us do? • But . . . Good design demands compromise • Keep formats as similar as possible • Introduce a new type of instruction format • I-type for data transfer instructions • destination address no longer in the rdfield – but in the rtfield • offset limited to 16 bits - so can’t get to every location in memory (with a fixed base address) • Example: lw $t0, 24($s2)

  41. . . . 1001 0100 + . . . 0001 1000 . . . 1010 1100 = 0x120040ac Memory Address Location Memory • Example:lw $t0, 24($s2) 0xf f f f f f f f 2410 + $s2 = $t0 0x00000002 0x120040ac 0x12004094 $s2 Note that the offset can be positive or negative 0x0000000c 0x00000008 0x00000004 0x00000000 data word address (hex)

  42. 43 18 8 24 101011 10010 01000 0000000000011000 op rs rt 16 bit number Machine Language - Store Instruction (I-type) • Example: sw $t0, 24($s2) • A 16-bit offset means access is limited to memory locations within a range of +213-1 to -213 (~8,192) words (+215-1 to -215 (~32,768) bytes) of the address in the base register $s2 • 2’s complement (1 sign bit + 15 magnitude bits)

  43. I format op rs rt 16 bit immediate 8 19 19 4 Machine Language – Immediate Instructions • What instruction format is used for the addi ?addi $s3, $s3, 4 #$s3 = $s3 + 4 • Machine format: • The constant is kept inside the instruction itself! • So must use the I format – Immediate format • Limits immediate values to the range +215–1 to -215

  44. Instruction Format Encoding • Can reduce the complexity with multiple formats by keeping them as similar as possible • First three fields are the same in R-type and I-type • Each format has a distinct set of values in the op field

  45. lw 35 19 8 8 sub 0 8 18 8 0 34 sw 43 19 8 32 Assembling Code • Remember the assembler code we compiled for the C statement A[8] = A[2] - b lw $t0, 8($s3) #load A[2] into $t0 sub $t0, $t0, $s2 #subtract b from A[2] sw $t0, 32($s3) #store result in A[8] • Assemble the MIPS object code for these three instructions (decimal is fine)

  46. Review: MIPS Instructions, so far

  47. Stored Program Computers • Instructions represented in binary, just like data • Instructions and data stored in memory • Programs are stored in memory to be read or written, just like numbers • Programs can operate on programs • e.g., compilers, linkers, … • Binary compatibility allows compiled programs to work on different computers • Standardized ISAs

More Related