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Programmable Logic Devices. Read Only Memory (ROM) mask programmable PROM, EPROM, EEPROM Programmable Logic Array (PLA) Programmable Array Logic (PAL) Field Programmable Gate Array (FPGA) Mux based LUT based. ROMs. Input: k Address lines (A) Output: d Data lines (D) Function:
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Programmable Logic Devices • Read Only Memory (ROM) • mask programmable • PROM, EPROM, EEPROM • Programmable Logic Array (PLA) • Programmable Array Logic (PAL) • Field Programmable Gate Array (FPGA) • Mux based • LUT based
ROMs • Input: k Address lines (A) • Output: d Data lines (D) • Function: Each possible value of A [0..(2^k)-1] has a unique set of d bits that are output on D when the corresponding “address” is provided on A
0 A0 A1 A2 Ak-1 1 2 Decoder (2^k)-1 fuses D0 D1 Dd-1 ROMs
A B F1 F2 F3 0 0 1 1 0 1 0 1 1 1 0 1 0 0 1 0 0 1 1 0 Implementing Logic in ROMs A B Decoder fuses F3 F1 F2
ROM Types • Mask programmable ROM • fuses programmed during manufacture • Programmable ROM (PROM) • 0’s programmed by blowing fuses or “burning” • Erasable PROM (EPROM) • programming erased by UV light • Electrically erasable PROM (EEPROM) • programming erased via control signals
m fuses n X k fuses k product terms (AND gates) m sum terms (OR gates) k X m fuses m outputs n inputs n X k fuses Programmable Logic Array (PLA)
D D D Programmable Array Logic (PAL)