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Pass Transistor Logic - PowerPoint PPT Presentation
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Pass Transistor Logic. Agenda. Introduction VLSI Design methodologies Review of MOS Transistor Theory Inverter – Nucleus of Digital Integrated Electronics Static CMOS Logic Circuits Pseudo nMOS Logic Circuits Pass Transistor Logic Circuits Dynamic Logic Circuits Case Studies.
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Presentation Transcript
Agenda
- Introduction
- VLSI Design methodologies
- Review of MOS Transistor Theory
- Inverter – Nucleus of Digital Integrated Electronics
- Static CMOS Logic Circuits
- Pseudo nMOS Logic Circuits
- Pass Transistor Logic Circuits
- Dynamic Logic Circuits
- Case Studies
Pass Transistor Logic Circuits
- nMOS Pass transistor – transmission properties
- Transmission Gates
- Transmission Gate Applications
- Mux
- XOR
- D Latch
- D Flip Flop
- Clock Skew management
- Pass Transistor Logic Families
PASS TRANSISTOR LOGIC CIRCUITS
- nMOS Pass transistor – transmission properties
- Transmission Gates
- Transmission Gate Applications
- Mux
- XOR
- D Latch
- D Flip Flop
- Clock Skew management
- Pass Transistor Logic Families
TRANSMISSION GATES
- NMOS pass transistor passes a strong 0 and a weak 1.
- PMOS pass transistor passes a strong 1 and a weak 0.
- Combine the two to make a CMOS pass gate which will
pass a strong 0 and a strong 1.
PROBLEMS WITH TRANSMISSION GATES
- No isolation between the input and output.
- Output progressively deteriorates as it passes through various stages.
However designs get simplified.
PASS TRANSISTOR LOGIC CIRCUITS
- nMOS Pass transistor – transmission properties
- Transmission Gates
- Transmission Gate Applications
- Mux
- XOR
- D Latch
- D Flip Flop
- Clock Skew management
- Pass Transistor Logic Families
Pass Transistor Logic Circuits
- nMOS Pass transistor – transmission properties
- Transmission Gates
- Transmission Gate Applications
- Mux
- XOR
- D Latch
- D Flip Flop
- Clock Skew management
- Pass Transistor Logic Families
PASS TRANSISTOR LOGIC CIRCUITS
- nMOS Pass transistor – transmission properties
- Transmission Gates
- Transmission Gate Applications
- Mux
- XOR
- D Latch
- D Flip Flop
- Clock Skew management
- Pass Transistor Logic Families
PASS TRANSISTOR LOGIC CIRCUITS
- nMOS Pass transistor – transmission properties
- Transmission Gates
- Transmission Gate Applications
- Mux
- XOR
- D Latch
- D Flip Flop
- Clock Skew management
- Pass Transistor Logic Families
Static Flip Flop
Clk
Clk
D
0
1
Q
1
0
Transparent when Clk=0
Transparent when Clk=1
At Clk= 0 1, Q = D. Else Q is held.
Pass Transistor Logic Circuits
- nMOS Pass transistor – transmission properties
- Transmission Gates
- Transmission Gate Applications
- Mux
- XOR
- D Latch
- D Flip Flop
- Clock Skew management
- Pass Transistor Logic Families
Pass Transistor Logic Circuits
- nMOS Pass transistor – transmission properties
- Transmission Gates
- Transmission Gate Applications
- Mux
- XOR
- D Latch
- D Flip Flop
- Clock Skew management
- Pass Transistor Logic Families
Pass Transistor Logic Families
- Complementary Pass Transistor Logic Family
- Dual Pass Transistor Logic Family
- Swing Restored Pass Transistor Logic Family
Problems
- Design 4 to 1 multiplexor using transmission-gates.
- Implement an XOR gate using minimum number of transistors.
- Implement a full adder using transmission gates.
