STAR silicon tracking detectors SVT and SSD

1. STAR silicon tracking detectorsSVT and SSD

2. Summary of the talk • Few words about STAR experiment and SVT • Design of the SSD and its elements • Ladder and barrel assembly • Installation • Improvement for ALICE ITS

3. Few words about STAR experiment and SVT • Design of the SSD and its elements • Ladder and barrel assembly • Installation • Improvement for ALICE ITS

4. Collision of two gold beams

5. STAR detector

6. SVT Design • 3 Barrels : • Inner at 6 cm • 8 ladders – 4 wafers/ladder • Middle at 10 cm • 12 ladders – 6 wafers/ladder • Outer barrel at 15 cm • 16 ladders – 7 wafers/ladder • Length : 42 cm • 216 wafers wafer FEE Average radiation length : 4.5%X0 incl. fee cards

7. SVT installation in summer 2001

8. Few words about STAR experiment and SVT • Design of the SSD and its elements • Ladder and barrel assembly • Installation • Improvement for ALICE ITS

9. Silicon Strip Detector

10. The purposes of the SSD • To enhance the STAR tracking performances due to its position resolution and its dE/dx capabilities. • To facilitate the connection of the TPC tracks and the hits in the SVT, being closer to the TPC. • To improve the tracking efficiency in the central region especially in the low momentum domain and for secondary particles.

11. The SSD for STAR r=20 m z= 740 m 20 ladders 16 modules per ladder 491520 analogue channels 1 square meter of double sided wafer Radiation length : 1.1% X0 Length : 1m Diameter : 46 cm

12. SSD Ladder

13. Design of the module Silicon Wafer TAB Hybrid Circuit

14. Double sided Stereoscopic angle : 35 mrad Thickness : 300 um Active area : 40 mm x 73 mm 768 strips per side Pitch : 95 um N strip insulation : P spray Biasing scheme : punch-through Operating voltage : < 50V Marks for positionning Manufacturer : Eurisys Design of the silicon wafer

15. Specifications : • AMS 1.2 um • Input range : 13 MIPs • Gain : 50mV/MIP • 340 uW/channel • Noise : 290 e- + 8 e-/pF • JTAG controlled • Internal pulse generator 6000µm 8700µm Readout chip : ALICE128C

16. This technique has multiple advantages : •  handling of the chips is easy, • test is possible in realistic conditions • Flexibility allowing 3D connection • Pitch adaptor • Industrial standard TAB tape

17. ALICE128C on a TAB tape

18. Module production flow

19. Detection Module

20. Detection Module 464 modules produced with a yield of 82%

21. SSD performances • S/N – Pside = 30 • S/N – Nside = 20 • Digital resolution : • 20 μm in transverse plane • 740 μm in Z axis

22. Carbon frame

23. Ladder cables and connection 3M Z-Axis Adhesive Films

24. Readout chain • ADC boards : • interface Readout boards/ladder • power supply distribution • Analogue to digital conversion • C2D2 board : • Interface modules/ADC board (analogue signal multiplexed) • reference voltage • Temperature measurement • Latch-up control • Bypass module, zero filling instead • Technology : board-Flex-board • Readout board : • Interface of the barrel to Slow control, Trigger and DAQ • Located on the TPC wheel 16 modules (P or N side) One Readout board 10 ADC+C2D2 boards 30 MHz BLVDS bus 3 MHz on a ladder shielded cable (2m) Ribbon cable (1m)

25. SSD cooling system : principle

26. SSD Cooling system : measurement results 24.5oC 19oC 30.7oC 3 W 33.2oC 27.6oC 25.1oC 30.9 oC 33.7oC 3 W 10 W 27.8 oC 33.1oC 29oC

27. JWS300 - 12 CAEN A516 CAEN A525 CAEN A516 CAEN A525 CAEN A525 CAEN A515 CAEN A525 JWS300 - 12 power su pply power supply power supply power supply powe r supply power supply power supply power supply power supply + 7 V 0V +5V 0V +2V 0V 0V +5V 0V +2V +2V 0V 0V 35V 0V +2V 0V 7V +35V +37V 0V 0V +35V +2V +33V - 2V - 2V +38V +33V 0V +3V +35V 0V 0V 0V 0V +35V ADC Boards ADC Boards Readout Readout +7V +7V +5V Connection Board Connection Board +5V 0V Board Board +2V 0V - 2V +37V +35V +33V Front end Front end 0V +35V electronics Detector electron ics 4 amperes fuse ´ 16 Power supply of one ladder Power supply of the readout board and the non floating part of the ADC board P side low voltage power supply (floating) N side low voltage power supply (floating) Biasing voltage One ladder

28. Few words about STAR experiment and SVT • Design of the SSD and its elements • Ladder and barrel assembly • Installation • Improvement for ALICE ITS

29. Ladder cables ADC & C2D2 boards Ladder frames Modules Visual inspection Electrical test Visual inspection Noise test Visual inspection Electrical test Visual inspection Soldering of the cables to the module Ladder pre-assembly Functional and Noise test Module placing on the assembly bench Placing and gluing the carbon ladder on top of the modules Functional and Noise test Packaging and storage until barrel assembly Ladder assembly flow • One ladder /week • 3 persons • First ladder : 3 weeks • 3 last ladders in 1 week (5 persons)

30. Ladder assembly

31. Ladder views

32. Sector assembly

33. One sector

34. SSD database You can visit it at : http://wwwstar-sbg.in2p3.fr/index.php

35. Few words about STAR experiment and SVT • Design of the SSD and its elements • Ladder and barrel assembly • Installation • Improvement for ALICE ITS

36. SSD installation

37. Milestones of the project • Design started in 1997 • Technical proposal approved in 1998 by STAR • Five modules prototypes in 2000 • First ladder produced and installed in 2002 • first half installed summer 2003 • Installation completed in summer 2004

38. Few words about STAR experiment and SVT • Design of the SSD and its elements • Ladder and barrel assembly • Installation • Improvement for ALICE ITS

39. Semi-automatic assembly bench

40. Graphic user interface

41. Soldering bench

42. ENDThank you