1 / 18

EEL4712 Digital Design

Get all the information you need for the EEL4712 Digital Design course taught by Dr. Farimah Farahmandi. Find out about the instructor, teaching assistants, lecture and lab sessions, prerequisites, lab assignments, reading materials, grading, and course policies. Stay updated with the course page and Canvas e-learning platform.

dwiley
Download Presentation

EEL4712 Digital Design

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. EEL4712 Digital Design

  2. Instructor • Farimah Farahmandi, Ph.D. • Assistant Professor, ECE • farimah@ece.ufl.edu • http://farimah.ece.ufl.edu/ • Office Hours: • Mondays & Wednesdays: 12:30 -1:30 pm (subject to change) • Office: MAE 226C • Also by appointment • Research Interest • Hardware Security Validation • Post-silicon Validation • Formal Methods

  3. Teaching Assistants • Jonathan Cruz, Ph.D. Student • Email: jonc205@ufl.edu • Office hours: Wed & Thu: 9:00-10:00 am • Room: NEB 288 • Muhtadi (Zaki) Choudhury, Ph.D. Student • Email: muhtadichoudhury@ufl.edu • Office hours: Tue & Fri: 2:00-3:00 pm • Room: NEB 288 • John Kearney, Undergraduate Student • Email: jkearney@ufl.edu • Office hours: Mon & Fri: 9:00-10:00 am • Room: NEB 288

  4. Teaching Assistants • Carlos Matos, Undergraduate Student • Email: carlosm04@ufl.edu • Office hours: Tue 1:00-2:00 pm & Thu 5:00-6:00 pm • Room: NEB 288 • Arvind Shankar, Undergraduate Student • Email: arvind.shankar@ufl.edu • Office hours: Wed & Tue: 3:00-4:00 pm • Room: NEB 288

  5. Lecture and Lab Sessions • Course Page • http://farimah.ece.ufl.edu/teaching/eel4712/ • Visit regularly for updates and announcements • Canvas E-learning • http://elearning.ufl.edu/ • Login with GatorLink account • Lectures • Mon/Wed/Fri 10:40 – 11:30 am LAR 310 • Lab Sessions • Mon, Period E2 - E3 (8:20 PM - 10:10 PM) (John) • Tue, Period 9 - 10 (4:05 PM - 6:00 PM) (Carlos) • Wed, Period 9 - 10 (4:05 PM - 6:00 PM) (Arvind) • Thu, Period 11 - E1 (6:15 PM - 8:10 PM) (Arvind) • Thu, Period E2 - E3 (8:20 PM - 10:10 PM) (John) • Fri, Period 6 - 7 (12:50 PM - 2:45 PM) (John) • Fri, Period 8 - 9 (3:00 PM - 4:55 PM) (Carlos)

  6. Prerequisite • EEL 3701 • Requires basic knowledge of: • Boolean logic • Sequential and combinational components • Logic minimization • State machines • Assembly programming • Assumes basic knowledge of VHDL • Please check with the instructor if you do not have the required pre-requisite

  7. Lab Assignments • Linked off main website/Canvas • Provide practical applications of concepts covered in lectures • All labs will use DE10-Lite FPGA board • http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&No=1021 • Altera MAX 10 FPGA • Each lab (after lab 0) will have a pre-lab assignment and an in-lab assignment • Some may have a post-lab assignment • See each lab for submission instructions • Lab quizzes • Will test basic understanding of concepts

  8. Lab Assignments • Labs will require effort outside of lab • Pre-lab assignments will be due at the beginning of lab • Lab 0 will be posted on website soon. Start immediately. • Labs will be VHDL intensive • Spend time outside of lab exercises practicing • Altera Quartus Prime • Download free version (lite edition) • https://dl.altera.com/?edition=lite • You only need MAX 10 FPGA device support • 15.1.2 definitely supports board, not sure about later versions • Do tutorials in appendix of the book! • Labs will also use Digilent Analog Discovery • https://mil.ufl.edu/3701/dad-nad.html • Logic analyzer for debugging outside of lab

  9. Reading Material • Textbook: • Brown, S. D. and Vranesic, Z. G., "Fundamentals of Digital Logic with VHDL Design", Second or Third Edition, McGraw-Hill • Recommended Textbooks: • Katz, Randy, and Gaetano Borriello. Contemporary Logic Design. 2nd Edition, Upper Saddle River, NJ:Pearson Prentice Hall, Inc • Digital Design Principles and Practices, John Wakerly, 5th Edition, Pearson • Supplemented materials • Will also post slides when used

  10. Grading • EEL4712 Grading: • Midterm 1: 20% (September 27) • Midterm 2: 20% (October 25) • Midterm 3: 20% (December 4) • Labs/Final project: 40% • Final grade • Curved average of all components • The shown grading scale is subject to change

  11. Academic Dishonesty • Unless told otherwise, assignments must be done individually • All assignments will be checked for cheating • Collaboration is allowed (and encouraged), but within limits • Can discuss problems, how to use tools etc. • Cannot show code, solutions, etc. • Cheating penalties • First instance - 0 on corresponding assignment • Second - 0 for entire class • Software is used to check lab assignments and projects

  12. Course Policies • No grades for late submissions. • Exams are closed book/notes. • Re-grading requests within a week. • One week from when it is available. • Attendance • On-time attendance in the class is mandatory. • Each missed class will cost 1 point from your overall course total. • There are no make-up exams/quizzes unless • Illness, serious family emergencies, UF-imposed curriculum requirement or activity, religious holiday, or jury duty

  13. Course Policy • Grades will NOT change: • Because you really worked hard on class • Because you need to graduate • Because otherwise you will lose your scholarship • Because you will otherwise not get your internship • Want a good Grad? Earn it!

  14. Commitment to a safe and inclusive learning environment • The Herbert Wertheim College of Engineering values broad diversity within our community and is committed to individual and group empowerment, inclusion, and the elimination of discrimination.  • It is expected that every person in this class will treat one another with dignity and respect regardless of gender, sexuality, disability, age, socioeconomic status, ethnicity, race, point of view, or culture. • If you feel like your performance in class is being impacted by discrimination or harassment please contact me or any of the following: • Your academic advisor or Undergraduate/Graduate Program Coordinator • Robin Bielling, Director of Human Resources, 352-392-0903, rbielling@eng.ufl.edu • Curtis Taylor, Associate Dean of Student Affairs, 352-392-2177, taylor@eng.ufl.edu • Toshikazu Nishida, Associate Dean of Academic Affairs, 352-392-0943, nishida@ufl.edu • Office of Title IX Compliance, 352-273-1094, title-ix@ufl.edu

  15. Course Introduction • Why should you be excited about this class? • Digital design is important in all aspects of computing • Microprocessor architecture, graphics processing units (GPUs) • Embedded systems • Portable (low-power), high-performance functionality enabled by custom circuits implemented as ASICs (application-specific integrated circuits) • e.g., phones, portable game consoles, etc. • Reconfigurable computing • Enables custom circuits without creating an ASIC • Combines flexibility of software with performance of ASIC • High-performance computing • Custom circuits are often 10x-1000x faster than microprocessors!!! • In this class, you will learn the fundamentals of creating circuits that are 10x-1000x faster than microprocessors

  16. Course Outline • VHDL Introduction • Arithmetic Operation • Combinational Logic • Sequential Logic • FPGA Architecture • MIPS Processor • Multiple Clock Domains • Asynchronous Sequential Logic • Test/Verification

  17. Reminder • Start reading details of lab 0 (will be posted soon) • Review chapter 6 • Combinational logic

  18. Thank You!

More Related