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ACS-R Optimization Campaign Dry Run: Status Report. David Golimowski TIPS/JIM 19 March 2009. ACS-R Flight Hardware. During SM4 (EVA-3) four elements of the ACS will be replaced or modified:

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Acs r optimization campaign dry run status report
ACS-R Optimization Campaign Dry Run: Status Report

David Golimowski TIPS/JIM 19 March 2009

Acs r flight hardware
ACS-R Flight Hardware

During SM4 (EVA-3) four elements of the ACS will be replaced or modified:

CCD Electronics Box Replacement (CEB-R) is the heart of the ACS-R hardware: it will control and read out the ACS WFC CCDs.

Schematic diagram of ceb r
Schematic Diagram of CEB-R

  • CEB-R features Teledyne SIDECAR* ASIC** that permits optimization of WFC performance via adjustment of CCD clocks, biases, and pixel transmission timing

  • Built in oscilloscope mode (O-mode) allows sensing of analog signal from each output amplifier

* System for Image Digitization,

Enhancement, Control, and Retrieval

** Application Specific Integrated Circuit

Sample o scope image
Sample O-scope Image

Reset Gate

DSI output B

Raw video B

Raw video A

Acs r optimization campaign
ACS-R Optimization Campaign


  • ACS-R Optimization Campaign (OC) in SMOV begins ~10 days after ACS-R installation and AT/FT

  • 8 iterations over 24 days designed to optimize CCD read noise, dark current, CTE, full-well depth, linearity, cross-talk, and data transmission timing

  • Bias, dark, flat, EPER, and subarray images taken at different gain, CDS modes (DSI and Clamp & Sample), and readout speeds.

  • Teledyne and GSFC will analyze O-mode data; STScI will analyze image data.

Acs r optimization campaign dry run status report

Optimization Campaign Timeline

  • Visits A and G (general performance tests) are executed in all iterations

  • Visits B, C, D, E, and F optimize specific performance characteristics (settling times, clock coupling, voltages) and are not executed in all iterations

  • Visits A, B, D, E, and F contain image data

  • Visits B, C, and G contain O-mode data

  • OC may be truncated at SMS boundary (currently between Iters 5 & 6)

Acs r oc dry run
ACS-R OC Dry Run

  • Complicated technical and logistical issues demand Dry Run rehearsal of OC in February/March time frame    Completed yesterday!

  • GSFC, Teledyne, and STScI participated

  • GSFC configured EM-3 unit (CEB-R and LVPS-R) and Build-5 WFC in ESTIF

  • Only first 4 iterations of the OC were simulated

  • All iterations were SMS driven

Dry Run dates and durations:

Iteration 1: Feb 11-13 31 hr SMS

Iteration 2: Feb 23, Mar 2-3 15 hr SMS

Iteration 3: Mar 5-6, 9-10 27 hr SMS

Iteration 4: Mar 12-13, 16-18 18 hr SMS

Dry run personnel
Dry Run Personnel


Olivia Lupie, Steve Arslanian, Kevin Boyce, Rick Burley, Darryl Dye, Dennis Garland, Mike Kelly, Kathleen Mil, Barbara Scott, Beverly Serrano, Colleen Townsley, Augustyn Waczynski, Erin Wilson

Ed Cheng (Conceptual Analytics)



Markus Loose, Raphael Ricardo


David Golimowski, Linda Smith, Marco Sirianni (ESTEC), Carl Biagetti, George Chapman, Marco Chiaberge, Tyler Desjardins, Norman Grogin, Tracy Ellis, Pey-Lian Lim, Ray Lucas, Aparna Maybhate, Max Mutchler, Anatoly Suchkov (JHU), Mike Swam, Tom Wheeler

Dry run results 1
Dry Run Results (1)

Iteration 1 : a bumpy start

  • All performance and optimization tests executed to assess baseline

  • Bias & clock voltages set for WFC#4 (Flight build)

  • Problems found in several areas:

    1) ESTIF: Lamp too bright (saturated data); “un-dark” biases and darks

    2) SMS: No 1-min delay between changes of gain or CDS

    3) OPUS: Crashes and incorrect keywords exposed outdated EUDL and

    CCDTAB reference files

    4) FT: Mismatched gain/offset parameters; subarray readout problem

    Items 1-3 fixed for Iteration 2; FT issues now resolved

  • Despite limited data, STScI correctly assessed read noise and limited full-well depth expected for non-optimal initial voltage configuration.

Dry run results 2
Dry Run Results (2)

Iteration 2:

  • General performance tests (A & G) and one optimization test (C)

  • Bias & clock voltages set for WFC#5 (flight spare)

  • Full-speed read noise 4.0-4.5 e– (DSI); 4.5-5.0 e– (C&S)

    Variable striation in bias images attributed to 1/f noise from MOSFET

  • Lamp now too faint; full-well exposure not obtained

    Full-well depth raised to > 60K e–

  • Bias offset for half-speed DSI frames too low; ADC saturated at low end

  • High frequency vertical striping in half-speed, C&S A-amp bias frames

  • Lack of hot pixels & cosmic rays preclude CTE and cross-talk tests

Iteration 2 bias frames
Iteration 2: Bias Frames

Full speed, Dual-Slope Integrator

Full speed, Clamp & Sample

Iteration 2 bias frames1
Iteration 2: Bias Frames

Half speed, Dual-Slope Integrator

Half speed, Clamp & Sample

Dry run results 3
Dry Run Results (3)

Iteration 3:

  • General performance tests (A & G) and 2 optimization tests (D and E)

  • Bias & clock voltages set for WFC#5 (flight spare)

  • Lamp brightness well matched to on-orbit cal lamp

    Full-well depth measured at nominal ~80K e–

  • Visit D — Bias Voltage Optimization Test:

    Read noise lower, amp gains more consistent with VOD = VDD = +1 V

  • Visit E — Clock Voltage Optimization Test:

    CTE too good for analysis software; need to improve algorithm

  • Half-speed read noise 3.5-4.5 e– (DSI); 6.5-7.0 e– (C&S)

    DSI: ~0.5 e–better than full-speed

    C&S: significantly worse than full-speed

Iteration 3 photon transfer test
Iteration 3: Photon Transfer Test

  • Full-well depth measured at nominal ~80K e–

  • Gain = 2.3 e– /DN

  • Excellent linearity

Dry run results 4
Dry Run Results (4)

Iteration 4:

  • General performance tests (A & G) and 2 optimization tests (C and F)

  • “Up-linked” new default VOD and VDD for Iteration 4

  • Visit F — Science Data Transmission Optimization Test:

    Find optimal size and delays of bit transfers from CEB-R to MEB

Summary and imminent tasks
Summary and Imminent Tasks

  • Dry Run was extremely useful for testing analysis software, training analysts, verifying communication and data flow, and exposing bugs and features. STScI is well prepared to tackle “The Real Thing.”

  • Need to verify and summarize analysis of all Iterations for Dry Run debrief

  • Need to revise some analysis software with newly exposed flaws

  • Rerun all data through OPUS to ensure proper keyword population

  • Insert 1-extra day of analysis for each iteration into SMOV timeline

    SMSes take longer than expected to execute; data will come to us less promptly and frequently during OC; need more thinking time.

  • Ensure that successful implementation of FT is captured in EVA-3 command plan

    Review of revised CP occurred yesterday; all proposed changes found to be in order and accepted.