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Implementing tries in RAM

Implementing tries in RAM. RAM Addr. Content =0, =1, rule 1 2,3,0 2 0,4,a 3 5,6,d 4 7,c,0 5 e,0,0 6 8,9,0 7 10,0,0 8 f,g ,0 9 h,i ,0 10 b,0,0 a => to port X b => to port Y c => to port X. (rule=0 => no rule).

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Implementing tries in RAM

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  1. Implementing tries in RAM RAM Addr. Content =0, =1, rule 1 2,3,0 2 0,4,a 3 5,6,d 4 7,c,0 5 e,0,0 6 8,9,0 7 10,0,0 8 f,g,0 9 h,i,0 10 b,0,0 a => to port X b => to port Y c => to port X ... (rule=0=>no rule) Each node stored in one word, containing at most 3 ptrs: • left: next rule if bit is 0 • centre: next rule if bit is 1 • right: rule if this is last matched bit(Only need right pointer if other 2 aren’t leaves. e.g. not needed for nodes 8 and 9.) Start search at node 1, continue until either: • match leaf node, e.g. 011 matches c • can’t progress past a node, then use previous best match, e.g. 0101 matches a en route to blockage at node 7. 1 0 1 2 3 a d 4 5 6 8 7 9 c e 10 f g h i b 9751C4* 4/11/2014 Tim Moors

  2. 21 21 3 21 3 21 35 35 7 7 21 7 21 7 51 51 35 9 35 9 54 12 35 54 7 33 7 35 54 7 7 14 7 6 6 e.g. Multi-bit variable-stride trie 128.252.153.160 1000 0000 1111 1100 1001 1001 1010 0000 35 0000 step 1 step 2 step 3 step 4 35 68 0010 35 35 0100 35 35 0110 35 35 1000 1010 1 1100 35 14 35 1110 35 35 Slide by V. Sivaraman based on example from D. Taylor et al: 'Scalable IP lookup for programmable routers', Proc. Infocom, pp. 562-71, 2002 9751DE* 4/11/2014 Tim Moors

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