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Chapter 2

Chapter 2. Switching Algebra and Logic Circuits. Key words. Switching Algebra ( 开关代数 ) Boolean Algebra ( 布尔代数 ) Logic Circuits ( 逻辑电路 ) Logic Function ( 逻辑函数 ) OR ( 或 ) AND ( 与 ) NOT ( 非 ) NAND ( 与非 ) NOR ( 或非 )

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Chapter 2

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  1. Chapter 2 Switching Algebra and Logic Circuits

  2. Key words Switching Algebra (开关代数) Boolean Algebra (布尔代数) Logic Circuits (逻辑电路) Logic Function (逻辑函数) OR (或) AND (与) NOT (非) NAND (与非) NOR (或非) EXCLUSIVE-OR (异或)

  3. Complement (补) Product of Sums (或与) Truth Table (真值表) Karnaugh Map (卡诺图)

  4. Chapter 2 - Subjects • 2.1 Definition of Switching Algebra • 2.2 Basic Properties of Switching Algebra • 2.3 Manipulation of Algebra Functions • 2.4 Implementation of Functions with AND, OR and NOT Gates • 2.5 From the Truth Table to Algebraic Expressions • 2.6 Introduction to the Karnaugh Map • 2.7 The Complement and Product of Sums • 2.8 NAND, NOT, and Exclusive-OR Gates

  5. 2.9 Simplification of Algebra Expressions • 2.10 Manipulation of Algebraic Functions and NAND Gate Implementions • 2.12 Solved Problems • 2.13 Exercises

  6. 2.1 Definition of Switching Algebra • Switching algebra is binary, that is, all variables(变量） and constants（常量） take on one of two values, 0 and 1. Quantities（量值） are not naturally binary must then be coded into binary format. • Gate : a gate is a circuit with one output that implement one of the basic functions. such as OR, AND , NOT.

  7. A B F E 2.1 Definition of Switching Algebra • 1 Three Operators of switching algebra: (1) OR (+) a+b (read asa or b) symbol: 国外常用符号 Truth table 国内符号 运算规则：有1出1，全0为0

  8. (2) AND (•) ab (read asa AND b) symbol: A B F E 2.1 Definition of Switching Algebra 国外常用符号 Ttruth table 国内符号 运算规则：有0出0，全1为1

  9. A (3) NOT (’) a ’ (readasNOT a) symbol: R E 2.1 Definition of Switching Algebra 国外常用符号 F Truth table 国内符号

  10. Commutative property 交换律 Associative law 结合律 • 2 First Group of Properties: • P1a a+b=b+a • P1b ab=ba • P2a a+(b+c)=(a+b)+c • P2b a(bc)=(ab)c

  11. The deduction of OR and AND We can extend the definition of OR to a + b + c + d +… is 1 if any of the operands (操作数）(a, b, c , d… ) is 1; is 0 only if all is 0 and the definition of AND extends to a b c d… is 1 if all of the operands are 1 and is 0 if any is 0.

  12. The Order of Precedence When evaluating expression without parentheses(括号）, the order of precedence is NOT AND OR Example: ab’+c’d =(a(b’))+((c’)d)

  13. 2.2 Basic Properties of Switching Algebra • P3a a+0=a P3b a·1=a • P4a a+1=1 P4b a·0=0 • P5a a+a’=1 P5b a·a’= 0 • P3aa 0+a=a P3bb 1·a=a • P4aa 1+a=1 P4bb 0·a=0 • P5aa a’+a=1 P5bb a’·a= 0 • P6a a+a=a P6b a·a=a • P7 (a’)’= a • P8a a(b+c)=ab+ac P8b a+bc=(a+b)(a+c) P8b证明过程

  14. 2.3 Manipulation of Algebraic Functions Literal （字母）: is the appearance of a variable or its complement a , b’, c, c’ (1) Product term (与项 ): ab’ bc’d a’d e’ (2)Standard product term (minterm)(标准与项 ；最小项): is a product term that includes each variable of the problem, either uncomplemented or complemented. such as: w’xyz wxy’z x’zyw (3) SOP: Sum of Products form (积之和式/与或式） is one or more product terms connected by OR operators.

  15. (4)Canonical sum /sum of standard product terms （标准和/标准与项和；最小项标准式;最小项之和） Is a sum of products expression where all of terms are standard product terms ex. abc+a’bc+ab’c’ (5) Minimum sum of products:(最简与或式) ① fewest number of product terms ② fewest number of literals

  16. (1) x’yz’ + x’yz + xy’z’ +xy’z + xyz (2)x’y+xy’+xyz (3) x’y+xy’+xz (4) x’y+xy’+yz 判断上面属于哪种形式？ 判断这些函数是否相等？

  17. 2.3 Manipulation of Algebraic Functions • P9aab+ab’=a • P9b(a+b)(a+b’)=a 利用上面的公式可完成（1）到（2）的证明 利用P6a可完成（1）到（3）（4）的证明

  18. （2）到(3) (4)的证明给出下面的公式 • P10aa+a’b=a+b • P10ba(a’+b)=ab a+a’b=(a+a’)(a+b) P8b =1 (a+b) = a+b

  19. 2.3 Manipulation of Algebraic Functions (6) Sum term (或项)： a+b’+c , b’ (just one literal) (7)Standard sum term (maxtern) (标准或项；最大项)： is a sum termthat includes each variable of the problem, either uncomplemented or complemented. such as: w’+x+y+z , w+x+y’+z , x’+z+y+w (8) POS: Product of sums (和之积式/或与式）

  20. (9) Canonical product /product of standard sum terms (标准与/标准或与项；最大项标准式) is a product of sums expression where all of the terms are standard sum terms. (10)Minimum product of sum (最简或与式) ①fewest number of sum terms ②fewest number of literals

  21. Ex. • a’b+ad • (a+b) (c+a’d) • a’+b’ • (a+b’)(b+c)(a’+c+d) • abcd+a’b’c’d+abc’d • (a+b+c+d’)(a’+b’+c+d)(a+b’+c+d)

  22. This is an example of a two-level circuit. The number of levels is the maximum number of gates through which a signal must pass from the input to the output. When inputs are available both uncomplemented and complemented, implementations of both sum of product and product of sum expressions result in two-level circuits. 2.4 Implementation of functions with AND, OR, and NOT Gates • 1 Block diagram of f in sum of standard products form f=x’yz’+x’yz+xy’z’ +xy’z+xyz This implementation assumes that all of the inputs are availabe both uncomplemented and complemented.

  23. f=x’yz’+x’yz+xy’z’ +xy’z+xyz complemented • The same function f can be manipulated to a sum of products expression (SOP Form): f=x’yz’+x’yz+xy’z’+xy’z+xyz+xy’z =x’y(z’+z)+xy’(z’+z)+xz(y+y’) =x’y+xy’+xz a+a=a Here, a=xy’z The simplest definition of minimum for a gate network is minimum number of gates and, among those with the same number of gates, minimum number of gate inputs.

  24. The resulting circuits are more than two levels. • 2 A product of sums expression (POS) corresponds to a two-level OR-AND network. f=(x+y)(x’ +y’ +z) • 3 neither SOP nor POS form: h=z’+wx’ y+v(xz+w’)

  25. 4 not complement If complemented inputs are not available, then an inverter (a not gate) is needed for each input that required to be complemented.

  26. Show a block diagram of a circuit using AND and OR gates for each side of P8b: a + b c = (a + b) (a + c)

  27. Integrated circuits (ICs) can be categorized as: SSI: Small-scale integration MSI: Medium-scale integration LSI: Large-scale integration VLSI: Very large-scale integration Transistor-Transistor Logic (TTL) Gates are typically available in dual in-line packages(DIPs). These packages are often referred to as chips.

  28. VCC 14 13 12 11 10 9 8 7404 1 2 3 4 5 6 7 GND • Common AND, OR and NOT integrated circuits: 7404 6(Hex) NOT gates 7408 4(quadruple) two-input AND gates 7411 3(triple) three-input AND gates 7421 2(dual) four-input AND gates 7432 4(quadruple) two-input OR gates

  29. Example 7.Show a block diagram of a system using AND,OR and NOT gate to implement the following function. Assume that variable are available only uncomplemented. F=(A(B+C)’+BDE)(A’+CE)

  30. 8. For each of the following circuits I find an algebraic expression II put it in sum of product form. a. a.I g=(d+e)c’+cde’ II g=c’d+c’e+cde’

  31. Each row of the truth table corresponds to a product term. A sum of products expression is formed by ORing those product terms corresponding to rows of the truth table for which the function is 1. Each product term has each variable included, with that variable complemented when the entry in the input column for that variable contains a 0 and uncomplemented when it contains a 1. a b f 0 0 0 0 1 1 1 0 1 1 1 1 2.5 From the truth table to algebraic expressions • A two-variable truth table There are 4 possible combinations of inputs. What the table says is that: f is 1 if a=0 and b=1 or if a=1 and b=0 or if a=1 and b=1 These product terms include all of the variables, they are minterms. Minterms are oftern referred to by number, by just converting the binary number in the input row of the truth table to decimal. f = a’b+ab’+ab f = m1+m2+m3 =∑m(1,2,3) This is the same as saying: f is 1 if a’=1 and b=1 or if a =1 and b’=1 or if a=1 and b=1

  32. abc Minterm number marked 000 A’B’C’ 0 m0 001 A’B’C 1 m1 010 A’BC’ 2 m2 011 A’BC 3 m3 100 AB’C’ 4 m4 101 AB’C 5 m5 110 ABC’ 6 m6 111 ABC 7 m7 Minterms (最小项) For a three-variable function, the minterms and minterm numbers that are used for all functions of three variables.

  33. Minterms (最小项) f f’ ABC 000 001 010 011 100 101 110 111 0 1 1 0 1 0 1 0 1 0 1 0 0 1 0 1 f ’(A,B,C)=∑m(0,6,7) minimum sum of products expression: f(A,B,C)= ∑m(1,2,3,4,5) =a’b’c+a’bc’+a’bc+ab’c’+ab’c =a’b’c+a’b+ab’ =a’c+a’b+ab’ =b’c+a’b+ab’ =A’B’C’+ABC’+ABC Example 2.2 We should write the function of f and its complement f ’. f(A,B,C)=∑m(1,2,3,4,5) =A’B’C+A’BC’+A’BC+AB’C’+AB’C is the simplest way to specify the functions Note that: The two sum of minterm forms are sum of product expressions. Butin most cases, including this one, the sum of minterms expression is not a minimum sum of products expression.

  34. Minterms (最小项) f abc 000 001 010 011 100 101 110 111 × 1 1 × 0 1 0 0 What is don’t care? Example 2.3 If the function includes don’t cares, then those terms are included in a separate sum (∑). In some systems, the value of the output is specified for only some of the input conditions. (Such functions are sometimes referred to as incompletely specified functions.) For the remaining input combinations, it does not matter what the output is, that is, we don’t care. In truth table, don’t care are indicated by an “x”

  35. Don’t care(无关项） 无关项： 1、约束项：在某些系统中，输入变量的取值不是任意的，也就是说某些输入变量的组合不存在。 2、任意项：输入变量取值后，输出既可以是0，也可以是1，对最终的输出不影响。这种情况多存在于中间过程中。

  36. Ex. • 约束项：三个逻辑变量A,B,C表示一台电机的正转，反转和停止。A=1表示正转，B＝1表示反转，C＝1表示停止。因为电动机任何时候只能执行一个命令，所以两个变量不能同时为1，即：ABC=001,010,100, 不能为000，011，101，110，111。可表示为： a’b’c’+a’bc+ab’c+abc’+abc=0 • 任意项：多存在于中间系统中。

  37. Minterms (最小项) f abc 000 001 010 011 100 101 110 111 × 1 1 × 0 1 0 0 Example 2.3 If the function includes don’t cares, then those terms are included in a separate sum (∑). We can write f(a,b,c)=∑m(1,2,5)+∑d(0,3)

  38. Example: 3人表决器 truth table Algebraic expression f=a’bc+ab’c+abc’+abc f(a,b,c)=∑m(3,5,6,7)

  39. Example 举重裁判电路: F=AB’C+ABC’+ABC F=∑m(5,6,7)

  40. Ex. A system to do 1 bit of binary addition, it has three inputs(the 2 bits to be added plus the carry from the next order bit) and prouces two outputs, a sum bit and a carry to the next higher order position. Cout=a’bc+ab’c+abc’+abc S=a’b’c+a’bc’+ab’c’+abc

  41. A A 0 0 1 1 B B 0 0 A’B’ m0 AB’ m2 1 1 A’B m1 AB m3 2.6 Introduction to the Karnaugh map The Karnaugh map consists of one square for each possible minterm in a function. Thus, a two-variable map has 4(22) squares, a three-variable map has 8(23) squares, and a four-variable map has 16(24) squares. Two-variable Karnaugh map

  42. AB AB 00 00 01 01 11 11 10 10 C C 0 0 A’B’C’ m0 m2 A’BC’ ABC’ m6 m4 AB’C’ 1 1 m1 A’B’C m3 A’BC m7 ABC AB’C m5 2.6 Introduction to the Karnaugh map (Con.) Three-variable karnaugh map gray code Note: the last two columns are not in numeric order, by organizing the map with gray codes, the minterms in adjacent squares can always be combined using P9a. ab+ab’=a(b+b’)=a

  43. gray codes AB AB 00 00 01 01 11 11 10 10 CD CD m0 A’B’C’D’ A’BC’D m4 ABC’D’ m12 AB’C’D’ m8 00 00 A’B’C’D m1 A’BC’D m5 m13 ABC’D AB’C’D m9 01 01 m3 A’B’CD m7 A’BCD m15 ABCD AB’CD m11 11 11 A’B’CD’ m2 m6 A’BCD’ m14 ABCD’ m10 AB’CD’ 10 10 gray codes 2.6 Introduction to the Karnaugh map (Con.) Four-variable karnaugh map

  44. Examples: f(a,b)=∑m(0,3) f(a,b)=∑m(0,3)+∑d(2) a a 0 0 1 1 b b 0 0 1 1 φ 1 1 1 1 2.6 Introduction to the Karnaugh map (Con.) When we plot a function, we put a 1 in each square corresponding to a minterm that is included in the function, and put a 0 in or leave blank those squares not included in the function. For functions with don’t cares, an × or φ goes in the square for which the minterm is a don’t care (We can see that as 0 or 1). Assume: the order is ab

  45. AB AB 00 01 11 10 00 01 11 10 CD CD 00 00 01 01 1 1 11 11 1 1 21 10 10 In adjacent In opposite AB AB 00 01 11 10 00 01 11 10 CD 1 1 CD 1 1 00 00 1 1 01 01 11 11 22 10 10 1 1 adjacent squares can always be combined ABC’D+AB’C’D=A(B+B’)C’D=AC’D A’B’CD+AB’CD=(A’+A)B’CD=B’CD ∑m(0,2,8,10)=B’D’ ∑m(5,7,13,15)=BD

  46. AB AB 00 01 11 10 00 01 11 10 CD CD 00 00 1 01 01 1 1 1 22 11 11 1 1 1 10 10 1 ∑m(0,1,2,3,8,9,10,11)=B’ ∑m(12,13,14,15)=AB ∑m(1,3,5,7,9,11,13,15)=D ∑m(1,3,9,11)=B’D AB AB 00 01 11 10 00 01 11 10 CD CD 1 1 1 1 1 1 00 00 01 01 1 1 1 1 1 1 23 11 11 1 1 10 10 1 1 adjacent squares can always be combined

  47. AB ab 00 01 11 10 CD 00 01 11 10 c m0 m4 m12 m8 00 0 0 1 2 3 6 7 4 5 m1 m5 m13 m9 01 1 m3 m7 m15 m11 11 m2 m6 m14 m10 10 2.6 Introduction to the Karnaugh map (Con.) In reading the map, it is useful to label the pairs of the columns B C A B D C A

  48. AB 00 01 11 10 CD 1 00 1 1 1 01 1 1 1 11 1 10 2.6 Introduction to the Karnaugh map (Con.) The easiest way to identify the term from the map is by determining in which row and column all of the 1’s are located. A D A’B’ F(A,B,C,D)=A’B’+AD

  49. ab 00 01 11 10 c 0 1 1 1 1 1 2.6 Introduction to the Karnaugh map (Con.) P9aa. a’b’+a’b+ab+ab’=1 A’B’C+A’BC+ABC+AB’C=C(A’B+A’B+AB+AB’) P9bb. (a’+b’)(a’+b)(a+b)(a+b’)=0

  50. ab 00 01 11 10 c 0 1 1 1 1 1 Plot the K-Map of f Example f=a’b’c’+a’bc’+a’bc+ab’c’ f=b’c’+a’b f=b’c’+a’b+a’c’ a minimum sum of product solutions, how to find a minimum term solutions in Chap 3

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