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Spectral Methods for Testing of Digital Circuits

Spectral Methods for Testing of Digital Circuits. Doctoral Defense Nitin Yogi Dept. of ECE, Auburn University. Dissertation Committee: Chair: Prof. Vishwani D. Agrawal Prof. Victor P. Nelson Prof. Adit D. Singh Prof. Charles E. Stroud Outside reader: Prof. Paul M. Swamidass.

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Spectral Methods for Testing of Digital Circuits

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  1. Spectral Methods for Testing of Digital Circuits Doctoral Defense Nitin Yogi Dept. of ECE, Auburn University Dissertation Committee: Chair:Prof. Vishwani D. AgrawalProf. Victor P. Nelson Prof. Adit D. Singh Prof. Charles E. StroudOutside reader:Prof. Paul M. Swamidass June 12, 2009

  2. Outline • Test challenges & primary goals of this work • Spectral analysis fundamentals • Contributions of this thesis • Spectral RTL Test generation • Minimization of N-model tests • Spectral TPG for BIST • Conclusion Nitin Yogi - Doctoral Defense

  3. Manufacturing Test Challenges NIST Advances in Microelectronic Fabrication Effects • Decreasing feature sizes • Increasing design complexities Microchip Corp. • Manufacturing Test Issues • Increase in test generation complexity • More specific test patterns required • Higher number and more complex defects • Increase in test data volume • Increase in test time Nitin Yogi - Doctoral Defense

  4. Primary Goals of this Work 1. Develop an efficient test generation algorithm • High fault coverage • Low test generation complexity • Low number of test vectors Issues addressed Increase in test generation complexity Increase in test data volume Nitin Yogi - Doctoral Defense

  5. Primary Goals of this Work 2. Develop a minimization approach for N-Model tests (multiple fault models) • High test minimization capability • Ability to handle diverse and custom fault models Issues addressed Increase in test data volume Higher number & more complex defects Nitin Yogi - Doctoral Defense

  6. Primary Goals of this Work 3. Develop a Built-In Self Test (BIST) synthesis scheme • High fault coverage • Low area overhead • Low test application time Issues addressed More specific test patterns required Increase in test time Nitin Yogi - Doctoral Defense

  7. Outline • Test challenges & primary goals of this work • Spectral analysis fundamentals • Contributions of this thesis • Spectral RTL Test generation • Minimization of N-model tests • Spectral TPG for BIST • Conclusion Nitin Yogi - Doctoral Defense

  8. Spectral Analysis Fundamentals • Basic idea: Interpret information in frequency domain • Binary bit-streams converted to spectral coefficients using transforms like Hadamard, Haar, etc. • Motivation: Good quality test vectors exhibit certain discernible spectral characteristics • Premise supported by findings of earlier works Nitin Yogi - Doctoral Defense

  9. Walsh Functions and Hadamard Matrix • Walsh functions: a complete orthogonal set of basis functions that can represent any arbitrary bit-stream. • Walsh functions form the rows of a Hadamard matrix. w0 w1 w2 w3 Walsh functions (order 3) H(3)= w4 w5 w6 w7 Example of Hadamard matrix of order 3 time Nitin Yogi - Doctoral Defense

  10. Test Vectors and Bit-streams Circuit Under Test (CUT) Outputs Input J Input 3 Input 5 Input 1 Input 4 Input 2 A binary bit-stream Vector 1 → Vector 2 → Vector 3 → Vector 4 → Vector 5 → Time Vector K→ Nitin Yogi - Doctoral Defense

  11. Spectral Analysis of a Bit-stream Input 1 Input 2 . . . Test vector set Original binary bit-stream Modified bit-stream Vector 1 Vector 2 Vector 3 . . . 0 to -1 Bit-stream of Input 2 Nitin Yogi - Doctoral Defense

  12. Spectral Analysis of a Bit-stream (cont.) Bit stream to analyze Bit stream Spectral coeffs. Hadamard Matrix H(3) = Correlating with Walsh functions by multiplying with Hadamard matrix. Prominent spectral component Nitin Yogi - Doctoral Defense

  13. Power Spectrum: “Interrupt” Signal* Examples of essential components Examples of noise components Normalized Power Theoretical random noiselevel (1/128) Spectral Coefficients * A primary input signal for PARWAN processor Nitin Yogi - Doctoral Defense

  14. Power Spectrum: “DataIn[5]” Signal Examples of essential components Examples of noise components Normalized Power Theoretical random noiselevel (1/128) Spectral Coefficients * A primary input signal for PARWAN processor Nitin Yogi - Doctoral Defense

  15. Power Spectrum: Random Signal Normalized Power Theoretical random noiselevel (1/128) Spectral Coefficients Nitin Yogi - Doctoral Defense

  16. Reverse Hadamard Transform Original binary bit-stream Spectral coeffs. Hadamard Matrix H(3) Bit-stream ÷ 8 = -1 to 0 Nitin Yogi - Doctoral Defense

  17. Spectral Vector Generation Perturbed spectral coeffs. Hadamard Matrix H(3) New binarybit-stream Bit-stream sign -1 to 0 ÷ 8 = Bits changed Nitin Yogi - Doctoral Defense

  18. Effect of Noise No. of faults detected by original vectors • Noise inserted in ATPG vectors using increasing spectral threshold (ST) values (i.e. increasing noise) More faults detected than original vectors Nitin Yogi - Doctoral Defense

  19. Significance of spectral properties • Two types of test vectors generated • Spectrally inserted noise by eliminating spectral coefficients below a threshold • Randomly inserted noise by flipping proportion of bits randomly Nitin Yogi - Doctoral Defense

  20. Significance of spectral properties Nitin Yogi - Doctoral Defense

  21. Significance of spectral properties Tests generated with ST=1 & ST=13 (3 sets for each) • T-test results • h = 1(hypothesis that the two data sets have equal means is rejected) • p = 8.85 x 10-18(probability with which both data sets will have equal values is low) Nitin Yogi - Doctoral Defense

  22. Significance of spectral properties Tests generated with ST=1, ST=13 & ST=25 (3 sets for each) • T-test results • h = 1(hypothesis that the two data sets have equal means is rejected) • p = 1.54 x 10-78(probability with which both data sets will have equal values is low) Nitin Yogi - Doctoral Defense

  23. Outline • Test challenges & primary goals of this work • Spectral analysis fundamentals • Contributions of this thesis • Spectral RTL Test generation • Minimization of N-model tests • Spectral TPG for BIST • Conclusion Nitin Yogi - Doctoral Defense

  24. Spectral RTL Test Generation • We propose a novel test generation algorithm using: • Register Transfer Level (RTL) information • Spectral techniques • Primary goals: • Low test generation complexity • High fault coverage • Low test vector length Nitin Yogi - Doctoral Defense

  25. Faults Modeled for an RTL Module CombinationalLogic Inputs Outputs RTL stuck-at fault sites FF FF A circuit is an interconnect of several RTL modules. Nitin Yogi - Doctoral Defense

  26. Proposed Test Generation Algorithm RTL circuit Spectral properties Step 2 Step 1 Generate test vectors for RTL faults Generate new test vectors by spectral coeff. perturbation Determine prominent spectral components by spectral analysis 010010100100101110111000100110111101011101010011111000010111000100010101101011011000001011010101 Fault simulate test vectors and compact Test vector set Nitin Yogi - Doctoral Defense

  27. Results for ITC’99 and ISCAS’89 Circuits * Reset input added. N. Yogi and V. D. Agrawal, “Spectral RTL Test Generation for Gate-Level Stuck-at Faults,” in Proc. 15th IEEE Asian Test Symp., 2006, pp. 83–88. Nitin Yogi - Doctoral Defense

  28. Results for PARWAN Processor *Sun Ultra 5, 256MB RAM N. Yogi and V. D. Agrawal, “Spectral RTL Test Generation for Microprocessors,” in Proc. 20th International Conf. VLSI Design, Jan. 2007, pp. 473–478. Nitin Yogi - Doctoral Defense

  29. Test Coverage Distribution Nitin Yogi - Doctoral Defense

  30. Test Coverage Distribution Nitin Yogi - Doctoral Defense

  31. Outline • Test challenges & primary goals of this work • Spectral analysis fundamentals • Contributions of this thesis • Spectral RTL Test generation • Minimization of N-model tests • Spectral TPG for BIST • Conclusion Nitin Yogi - Doctoral Defense

  32. Multiple Fault Models • N-Model tests: For a set of N given fault models, N ≥ 1, the N-model tests target detection of all faults in the superset of faults for all N fault models. • Importance • Each fault model targets specific defects • Sematech study (Nigh et. al. VTS’97) concluded …To detect most defects, tests for all fault models need to included. • Minimization problem • Obtain minimized test set for considered fault models • Take advantage of vectors detecting faults in multiple fault models • Fault simulator/ATPG handles only one fault model at a time • Need for a new minimization approach Nitin Yogi - Doctoral Defense

  33. Multiple Fault Model Test Minimization • Obtain fault dictionary by fault simulations • Determine faults detected by each vector • ‘F’ faults : for all considered fault models • ‘N’ vectors : generated to cover all faults ‘F’ • Test minimization by Integer Linear Program (ILP) considering the test application cost • ILP formulation • Set of integer variables • Set of constraints • Objective function • Solving the ILP assigns values to variables such that: • Constraints are met • Objective function is optimum Nitin Yogi - Doctoral Defense

  34. Combined ILP • Define two [0, 1] integer variables: • { tj , ij } – for each vector ; j = 1 to N • tj = 0 : drop vector j • tj = 1 : select vector j • ij = 0 : no IDDQ measurement for vector j • ij = 1 : measure IDDQ for vector j Nitin Yogi - Doctoral Defense

  35. Combined ILP (cont.) • Constraints {ck} for kth fault, k = 1 to F • For kth fault detected by vectors u, v and wck : tu + tv + tw≥ 1 iu + iv + iw≥ 1tu ≥ iutv ≥ ivtw ≥ iw Only if kthfault is an IDDQ fault Nitin Yogi - Doctoral Defense

  36. Combined ILP (cont.) • Objective function • Minimize {∑ tj + W × ∑ ij} • N : total number of vectors • tj : variables to select vectors • ij : variables to select IDDQ measurements • W : weighting factor, W ≥ 0 • How strongly to minimize IDDQ vectors(May depend on the relative cost of current measurement) N N j = 1 j = 1 Nitin Yogi - Doctoral Defense

  37. Hybrid LP – ILP • Approximate solution to ILP • Algorithm: • All variables redefined as real [0,1] variables (LP model) • Loop : • Solve LP • Round variables {tj} , {ij} as follows: • Round to 0 if ( 0.0 <variables≤ 0.1) • Round to 1 if ( 0.9 ≤variables< 1.0) • Exit loop if no variables are rounded • Reconvert variables to [0,1] integers & solve ILP Nitin Yogi - Doctoral Defense

  38. Conventional Test Vector Minimization Nitin Yogi - Doctoral Defense

  39. Results: N-Model Test Minimization Conventional test minimization results: N-Model test minimization results: * CPU time limit of 5000 s exceeded $ SUN Sparc Ultra 10, four CPU machine with 4.0 GB RAM shared among 4 CPUs Order of magnitude reduction in CPU time N. Yogi and V. D. Agrawal, “N-Model Tests for VLSI Circuits,” in Proc. 40th IEEE South-eastern Symp. System Theory, Mar. 2008, pp. 242–246. Nitin Yogi - Doctoral Defense

  40. Outline • Test challenges & primary goals of this work • Spectral analysis fundamentals • Contributions of this thesis • Spectral RTL Test generation • Minimization of N-model tests • Spectral TPG for BIST • Conclusion Nitin Yogi - Doctoral Defense

  41. Spectral TPG for BIST • We propose a novel design methodology for a Test Pattern Generator (TPG) for Built-In Self Test (BIST) environments • Primary goals: • Given pre-generated test vectors, replicate their effects in hardware • Support at-speed testing for non-scan circuits • Low area overhead • Low test application times Nitin Yogi - Doctoral Defense

  42. Proposed Design Methodology Pre-generated test vectors Spectral properties Step 2 Step 1 Preprocess test vectors (for combinational circuits) BIST implementation Determine prominent spectral components by spectral analysis BIST TPG gate-level netlist Nitin Yogi - Doctoral Defense

  43. Pre-processing of Test Vectors • Pre-processing of test vectors convenient for combinational circuits • Order of application of test vectors is immaterial • Method employed • Reshuffling of test vectors to enhance the spectral properties Nitin Yogi - Doctoral Defense

  44. Reshuffling Algorithm Input Data and Parameters: NI: No of inputs NV: No. of vectors V(1:NV,1:NI): Test vector Set of dimensions NV x NI hd: Dimension of Hadamard matrix H: Hadamard transform matrix of dimension 2hdx 2hd Procedure: Vector set V appended with redundant vectors to make weighting of bit-streams of all inputs = 0.5 for i=1 to NI Perform spectral analysis on bit-stream of input i: S = V(:,i) x H; Pick the prominent spectral component Sp(i) from S Rearrange vector set V such that maximum bits in the bit- streams of inputs 1 to i match with the picked prominent spectral components Sp(1 to i) respectively. end Nitin Yogi - Doctoral Defense

  45. Spectral TPG Architecture System clock To CUT Clock divider and holding circuit(for sequential CUTs) BIST clock Hadamard wave generator Weighted pseudo-random pattern generator 2 Spectral component synthesizer Input 1 System clock 3 BIST clock 1 To CUT Input 2 Randomizer 1 Hadamard Components Input 3 1 Weighted pseudo-random bit-streams Nitin Yogi - Doctoral Defense

  46. Reseeding • Reseeding: Setting memory elements (flip-flops) of TPG to values such that fault detection capability of generated test vectors improves. • Reseeding effectively used in earlier works for LFSRs, CARs, etc. Nitin Yogi - Doctoral Defense

  47. Reseeding of Spectral TPG Spectral BIST / Decompressor BIST / Decompressor Logic Flip-flops Data from external tester To CUT Parallel interface Serial scan interface Nitin Yogi - Doctoral Defense

  48. Outline • Test challenges & primary goals of this work • Spectral analysis fundamentals • Contributions of this thesis • Spectral RTL Test generation • Minimization of N-model tests • Spectral TPG for BIST • Results without reseeding • Results for combinational circuits • Results for sequential circuits • Results with reseeding • Results for combinational circuits • Conclusion Nitin Yogi - Doctoral Defense

  49. Spectral BIST Results and Area Overhead Test coverage comparison (64000 vectors) Area overhead comparison N. Yogi and V. D. Agrawal, “BIST/Test-Decompressor Design using Combinational Test Spectrum,” in Proc. 13th VLSI Design and Test Symp., Aug. 2009. Nitin Yogi - Doctoral Defense

  50. Test Coverage vs Number of Vectors Nitin Yogi - Doctoral Defense

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