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Introduction to 8086 Assembly Language Programming

Introduction to 8086 Assembly Language Programming. Prepared by: Prof. Ajaykumar T. Shah. Program Statements. name operation operand(s) comment Operation is a predefined or reserved word mnemonic - symbolic operation code directive - pseudo-operation code

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Introduction to 8086 Assembly Language Programming

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  1. Introduction to 8086 Assembly Language Programming Prepared by: Prof. Ajaykumar T. Shah Blog: aforajayshahnirma.wordpress.com

  2. Program Statements name operation operand(s) comment • Operation is a predefined or reserved word • mnemonic - symbolic operation code • directive - pseudo-operation code • Space or tab separates initial fields • Comments begin with semicolon • Most assemblers are not case sensitive Blog: aforajayshahnirma.wordpress.com

  3. 8086 Instruction - Example • Label Operator Operand[s] ;Comment • INIT: mov ax, bx ; Copy contents of bx into ax • Label - INIT: • Operator - mov • Operands - ax and bx • Comment - alphanumeric string between ; and \n • Not case sensitive • Unlike other assemblers, destination operand is first • mov is the mnemonic that the assembler translates into an opcode Blog: aforajayshahnirma.wordpress.com

  4. Pseudo-ops to define data or reserve storage DB - byte(s) DW - word(s) DD - doubleword(s) DQ - quadword(s) DT - tenbyte(s) These directives require one or more operands define memory contents specify amount of storage to reserve for run-time data Program Data and Storage Allocation directive Blog: aforajayshahnirma.wordpress.com

  5. Numeric data values 100 - decimal 100B - binary 100H - hexadecimal '100' - ASCII "100" - ASCII Use the appropriate DEFINE directive (byte, word, etc.) A list of values may be used - the following creates 4 consecutive words DW 40CH,10B,-13,0 A ? represents an uninitialized storage location DB 255,?,-128,'X' Defining Data Blog: aforajayshahnirma.wordpress.com

  6. Names can be associated with storage locations ANum DB -4 DW 17 ONE UNO DW 1 X DD ? These names are called variables ANum refers to a byte storage location, initialized to FCh The next word has no associated name ONE and UNO refer to the same word X is an unitialized doubleword Naming Storage Locations Blog: aforajayshahnirma.wordpress.com

  7. Arrays • Any consecutive storage locations of the same size can be called an array X DW 40CH,10B,-13,0 Y DB 'This is an array' Z DD -109236, FFFFFFFFH, -1, 100B • Components of X are at X, X+2, X+4, X+8 • Components of Y are at Y, Y+1, …, Y+15 • Components of Z are at Z, Z+4, Z+8, Z+12 Blog: aforajayshahnirma.wordpress.com

  8. DUP • Allows a sequence of storage locations to be defined or reserved • Only used as an operand of a define directive DB 40 DUP (?) DW 10h DUP (0) DB 3 dup ("ABC") db 4 dup(3 dup (0,1), 2 dup('$')) Blog: aforajayshahnirma.wordpress.com

  9. Word Storage • Word, doubleword, and quadword data are stored in reverse byte order (in memory) Directive Bytes in Storage DW 256 00 01 DD 1234567H 67 45 23 01 DQ 10 0A 00 00 00 00 00 00 00 X DW 35DAh DA 35 Low byte of X is at X, high byte of X is at X+1 Blog: aforajayshahnirma.wordpress.com

  10. Named Constants • Symbolic names associated with storage locations represent addresses • Named constants are symbols created to represent specific values determined by an expression • Named constants can be numeric or string • Some named constants can be redefined • No storage is allocated for these values Blog: aforajayshahnirma.wordpress.com

  11. .model small .stack 100H .data ;declarations .code main proc ;code main endp ;other procs end main Select a memory model Define the stack size Declare variables Write code organize into procedures Mark the end of the source file optionally, define the entry point Program Skeleton Blog: aforajayshahnirma.wordpress.com

  12. SEGMENT and ENDS Directives • a logical segment is a group of instruction statements or data statements contained between SEGMENT and ENDS directives • similar to the block concept in C++ • DATA_HERE SEGMENT • DATA_HERE ENDS Blog: aforajayshahnirma.wordpress.com

  13. Data Segments Storage for variables Variable addresses are computed as offsets from start of this segment Code Segment contains executable instructions Stack Segment used to set aside storage for the stack Stack addresses are computed as offsets into this segment Segment directives .data .code .stack size Program Segment Structure Used to indicate the beginning of logical segment. Blog: aforajayshahnirma.wordpress.com

  14. Other Directives • ASSUME • tells the assembler which logical segment to use for each physical segment • remember that just because I named my data segment DATA_HERE, doesn’t tell the assembler that that’s my data segment! • ASSUME DS:DATA_HERE, CS:CODE_HERE • segment registers other than the code segment must still be initialized • mov ax, DATA_HERE • mov ds, ax Segment value is not directly loaded into segment register bcoz of mov instruction limitation. Blog: aforajayshahnirma.wordpress.com

  15. GROUP • Informs the assembler to group the logical statement named in the directive into one logical group statement. • Linker is informed to link all grouped segments into single segment. • Groupname GROUP: Seg name1,….,SegnameN • Example: Small_model GROUP _code,_data,_stack,_extra ASSUME cs:Small_model, ds:Small_model, ss:Smallmodel Blog: aforajayshahnirma.wordpress.com

  16. MASM Directives • .TITLE • give the title of the program • .DOSSEG • use the MSDOS segment order • .MODEL small • use a small memory model • .8086 • 8086/88 instructions only • .STACK 0100h • start stack segment and specify size • .DATA • start data segment • .CODE • start code segment • END • tells the assembler to STOP reading…any instructions after this will be ignored • an optional label/address tells the assembler what to use as the program entry point Blog: aforajayshahnirma.wordpress.com

  17. DOS INT 21H instruction • int 21h ; interrupt program execution • 21h specifies that this is a DOS interrupt • value contained in ax can determine behavior of interrupt mov ah, 9 ;specify print to stdout mov dx, offset greeting ;specify what to print in dx int 21h mov ax, 4c00h ;return to DOS int 21h Blog: aforajayshahnirma.wordpress.com

  18. Masking • Masking a bit • if we AND a bit with 0, the result is always 0 • we have hidden(masked) the previous state of the bit • Masking a nibble • the smallest data we can AND is a byte • if we AND a bit with a 1, we have no effect on the bit • to mask the high nibble AND AL, 0FH ; AND AL with ; 00001111 to mask upper nibble • For the BCD Packing algorithm, we can also use a SHL - the source operand can be either CL or 1 - the destination operand can be either a register or memory Blog: aforajayshahnirma.wordpress.com

  19. Value returning directive • SIZE SIZE variable name, Returns no. of bytes Name DB/DW 50 DUP(?) ;BX=100 Exa: Mov Ax, SIZE Name • LENGTH Same as SIZE, Returns no. of element Name DB/DW 50 DUP(?) :BX=50 Exa: Mov Ax, LENGTH Name • OFFSET To determine displacement of specified variable wrt base of segment. Blog: aforajayshahnirma.wordpress.com

  20. Equal Sign Directive • name = expression • expression must be numeric • these symbols may be redefined at any time maxint = 7FFFh count = 1 DW count count = count * 2 DW count Blog: aforajayshahnirma.wordpress.com

  21. EQU Directive • name EQU expression • expression can be string or numeric • Use < and > to specify a string EQU • these symbols cannot be redefined later in the program Example: sample EQU 7Fh aString EQU <1.234> message EQU <This is a message> Mov AX, sample Blog: aforajayshahnirma.wordpress.com

  22. Types of Assembly Instructions • Data Transfer • MOV, LEA, PUSH, POP, IN, OUT • Arithmetic • ADD, SUB, MUL, DIV • Bit Manipulation • NOT, AND, OR, ROL, SHR • String Instructions • LODS, STOS, INS Blog: aforajayshahnirma.wordpress.com

  23. Program Execution LOOP, JNS, CALL, RET, JMP Processor Control HLT, NOP, STI Interrupt Control Blog: aforajayshahnirma.wordpress.com

  24. 1] MOV dest, src Note that source and destination cannot be memory location. Also source and destination must be same type. 2] PUSH Src: Copies word on stack. 3] POP dest: Copies word from stack into dest. Reg. 4]IN acc, port : Copies 8 or 16 bit data from port to accumulator. 5] OUT port, acc 6] LES Reg, Mem: Load register and extra segment register with words from memory. 7] LDS Reg, Mem: Load register and data segment register with words from memory. 8] LEA Reg, Src: load Effective address. (Offset is loaded in specified register) 9] LAHF: Copy lower byte of flag register into AH register. 10] SAHF: Copy AH register to lower byte of flag register. 11] XCHG dest, src: Exchange contains of source and destination. 12] XLAT: Translate a byte in AL. This instruction replaces the byte in AL with byte pointed by BX.To point desired byte in look up table instruction adds contains of BX with AL ( BX+ AL). Goes to this location and loads into AL. Data Transfer Instructions Blog: aforajayshahnirma.wordpress.com

  25. NO MOV Memory Immediate Segment Register Memory Segment Register Segment Register EX: MOV AL, BL Data Transfer Instructions - MOV Blog: aforajayshahnirma.wordpress.com

  26. Data Transfer Instructions - XCHG Example: XCHG [1234h], BX NO XCHG MEMs SEG REGs Blog: aforajayshahnirma.wordpress.com

  27. Data Transfer Instructions – LEA, LDS, LES • LEA BX,AMOUNT LEA AX,[BX][DI] • LDS/LES SI,STR_PTR LDS/LES BX,[5300H] Blog: aforajayshahnirma.wordpress.com

  28. The XLAT Instruction Replaces a byte in the AL register with a byte from the look up table. Before execution , BX should be loaded with offset address of lookup table in DS and AL. Example: Assume (DS) = 0300H, (BX)=0100H, and (AL)=0DH XLAT replaces contents of AL by contents of memory location with PA=(DS)0 +(BX) +(AL) = 03000H + 0100H + 0DH = 0310DH Thus (0310DH)  (AL) Blog: aforajayshahnirma.wordpress.com

  29. Example of XLAT Hex_table DB ‘0123456789ABCDEF’ CODE DB 12 ;conversion of code in decimal to hexadecimal Mov AL,CODE Mov BX,OFFSET Hex_table XLAT ;The value in AL is 0CH Blog: aforajayshahnirma.wordpress.com

  30. Logical Instructions + Blog: aforajayshahnirma.wordpress.com

  31. LOGICALInstructions • AND – Uses any addressing mode except memory-to-memory and segment registers – Especially used in clearing certain bits (masking) xxxx xxxx AND 0000 1111 = 0000 xxxx (clear the first four bits) – Examples: AND BL, 0FH AND AL, [345H] • OR – Used in setting certain bits xxxx xxxx OR 0000 1111 = xxxx 1111 (Set the upper four bits) Blog: aforajayshahnirma.wordpress.com

  32. XOR – Used in Inverting bits xxxx xxxx XOR 0000 1111 = xxxxx’x’x’x’ -Example: Clear bits 0 and 1, set bits 6 and 7, invert bit 5 of register CL: AND CL, OFCH ; 1111 1100B OR CL, 0C0H ; 1100 0000B XOR CL, 020H ; 0010 0000B Blog: aforajayshahnirma.wordpress.com

  33. 1] AAA : ASCII adjust after addition. We can add two ASCII numbers directly and use AAA after addition so as to get result directly in BCD. (Works with AL only) 2] DAA : Decimal adjust accumulator. ( Works with AL only) 3] AAS: ASCII adjust for subtraction ( Same as AAA and works with AL only) 4] DAS : Decimal adjust after Subtraction. ( Works with AL only) 5] MUL src 6 ] IMUL src: Multiplication of signed byte. 7] AAM: BCD adjust after multiply. ( Works with AL only) 8]DIV src If any one attempts to divide by 0 , then ? 9] IDIV: Division of signed numbers 10]AAD: BCD to Binary convert before Division. 11] CWD: Convert signed word to signed double word. 12] CBW : Convert signed byte to signed word. ( CBW and CWD works only with AL,AX and DX registers.) Arithmetic instruction Blog: aforajayshahnirma.wordpress.com

  34. Arithmetic Instructions: ADD, ADC, INC, AAA, DAA Blog: aforajayshahnirma.wordpress.com

  35. Ex.4 AL contains 25 (packed BCD) BL contains 56 (packed BCD) ADD AL, BL DAA 25 + 56 -------- 7B 81 Examples: Ex.1 ADD AX,2 ADC AX,2 Ex.2 INC BX INC WORD PTR [BX] Ex.3 ASCII CODE 0-9 = 30-39h MOV AX,38H ; (ASCII code for number 8) ADD AL,39H ; (ASCII code for number 9) AL=71h AAA ; used for addition AH=01, AL=07 ADD AX,3030H ; answer to ASCII 0107 AX=3137 Blog: aforajayshahnirma.wordpress.com

  36. Arithmetic Instructions – SUB, SBB, DEC, AAS, DAS, NEG Blog: aforajayshahnirma.wordpress.com

  37. Examples: DAS MOV BL, 28H MOV AL, 83H SUB AL,BL ; AL=5BH DAS ; adjust as AL=55H MOV AX, 38H SUB AL,39H; AX=00FF AAS ; AX=FF09 ten’s complement of -1 (Borrow one from AH ) OR AL,30H ; AL=39 Blog: aforajayshahnirma.wordpress.com

  38. Multiplication and Division Blog: aforajayshahnirma.wordpress.com

  39. Multiplication and Division Blog: aforajayshahnirma.wordpress.com

  40. Multiplication and Division Examples Ex1:Assume that each instruction starts from these values: AL = 85H, BL = 35H, AH = 0H 1.MUL BL → AL . BL = 85H * 35H = 1B89H → AX = 1B89H 2.IMUL BL → AL . BL = 2’SAL * BL = 2’S(85H) * 35H = 7BH * 35H = 1977H→2’s comp→ E689H → AX. • DIV BL → = = 02(85-02*35=1B) → 4.IDIV BL → = = AH AL 02 AH AL Blog: aforajayshahnirma.wordpress.com

  41. AH AL AH AL AH AL 62 15 15 FE 01 02 R Q R Q Ex2: AL = F3H, BL = 91H, AH = 00H • MUL BL → AL * BL = F3H * 91H = 89A3H → AX = 89A3H • IMUL BL → AL * BL =2’SAL *2’SBL = 2’S(F3H) *2’S(91H) = • 0DH * 6FH = 05A3H → AX. 3.IDIV BL → = = = 2→ (00F3 – 2*6F=15H) → → 2’s(02) = FEH→ 4. DIV BL → = = 01→(F3-1*91=62) → Blog: aforajayshahnirma.wordpress.com

  42. DX AX DX AX 06FE B000 8713 B000 Ex3: AX= F000H, BX= 9015H, DX= 0000H 1. MUL BX = F000H * 9015H = 2. IMUL BX =2’S(F000H) *2’S(9015H) = 1000 * 6FEB = 3. DIV BL = = B6DH →More than FFH→ Divide Error. 4. IDIV BL → = = C3H> 7F→ Divide Error. Blog: aforajayshahnirma.wordpress.com

  43. R Q R Q 60H 50H 20H D7H AH AL Ex4: AX= 1250H, BL= 90H 1.    IDIV BL → = = = = = = 29H (Q) → (1250 – 29 * 70) = 60H (REM) 29H ( POS) → 2’S (29H) = D7H → 2. DIV BL → = = 20H→1250-20*90 =50H → Blog: aforajayshahnirma.wordpress.com

  44. Procedure definition directive • Used to define subroutines, offers modular programming. • Call to procedure will be a transfer of control to called procedure during run time. PROC: indicates beginning of procedure. Procedure type helps assembler to decide weather to code return as near/far. Near/Far term follows PROC indicates type of procedure.[Near by default] ENDP: indicates assembler the end of procedure Example: Procedure Name PROC … ;do procedure code stuuff … RET Procedure Name ENDP Blog: aforajayshahnirma.wordpress.com

  45. MACRO definition directive • Used to define macro constants. • Call to macro will be replaced by its body during assembly time. • EQU: macro symbol • MACRO: informs assembler the beginning of macro. It is a open subroutines. It gets expanded when call is made to it. • MacroName MACRO [arg1,arg2…argn] • Advantage: save great amount of effort and time by avoiding overhead of writing repeated pattern of code. • ENDM: informs assembler the end of macro. Blog: aforajayshahnirma.wordpress.com

  46. Blog: aforajayshahnirma.wordpress.com

  47. Processor control instruction 1] CLC: Clear Carry flag. To check whether call is successful or not. 2] STC :Set carry Flag 3] CMC :Complement Carry Flag 4] CLD: Clear Direction Flag. SI & DI will be automatically incremented to point to next element of instruction. 5] STD: Set Direction Flag Auto decrement mode 6] CLI :Clear Interrupt Flag. Disable maskable hardware interrupt 7] STI : Set Interrupt Flag. 8] HLT: Halt Processing. 9] NOP : No Operation 10] ESC: Escape Executed by Co-processors and actions are performed according to 6 bit coding in the instruction. 11] LOCK : Assert bus lock Signal This is prefix instruction. 12] WAIT :Wait for test or Interrupt Signal. Assert wait states. Blog: aforajayshahnirma.wordpress.com

  48. HLT instruction – HALT processing the HLT instruction will cause the 8086 to stop fetching and executing instructions. The 8086 will enter a halt state. The only way to get the processor out of the halt state are with an interrupt signal on the INTR pin or an interrupt signal on NMI pin or a reset signal on the RESET input. NOP instruction this instruction simply takes up three clock cycles and does no processing. After this, it will execute the next instruction. This instruction is normally used to provide delays in between instructions. ESC instruction whenever this instruction executes, the microprocessor does NOP or access a data from memory for coprocessor. This instruction passes the information to 8087 math processor. Six bits of ESC instruction provide the opcode to coprocessor. when 8086 fetches instruction bytes, co-processor also picks up these bytes and puts in its queue. The co-processor will treat normal 8086 instructions as NOP. Floating point instructions are executed by 8087 and during this 8086 will be in WAIT. Blog: aforajayshahnirma.wordpress.com

  49. LOCK instruction this is a prefix to an instruction. This prefix makes sure that during execution of the instruction, control of system bus is not taken by other microprocessor. in multiprocessor systems, individual microprocessors are connected together by a system bus. This is to share the common resources. Each processor will take control of this bus only when it needs to use common resource. the lock prefix will ensure that in the middle of an instruction, system bus is not taken by other processors. This is achieved by hardware signal ‘LOCK’ available on one of the CPU pin. This signal will be made active during this instruction and it is used by the bus control logic to prevent others from taking the bus. once this instruction is completed, lock signal becomes inactive and microprocessors can take the system bus. WAIT instruction this instruction takes 8086 to an idle condition. The CPU will not do any processing during this. It will continue to be in idle state until TEST pin of 8086 becomes low or an interrupt signal is received on INTR or NMI. On valid interrupt, ISR is executed and processor enters the idle state again. Blog: aforajayshahnirma.wordpress.com

  50. Jumps • Unconditional • always jumps to the specified jump destination • Conditional • need to look at the register to evaluate the state of particular flags • the instruction specifies which flags to look at • this determines whether to fetch the next instruction from the jump destination or from the next sequential memory location Blog: aforajayshahnirma.wordpress.com

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