DC/DC Converter Update - PowerPoint PPT Presentation

bowen
slide1 n.
Skip this Video
Loading SlideShow in 5 Seconds..
DC/DC Converter Update PowerPoint Presentation
Download Presentation
DC/DC Converter Update

play fullscreen
1 / 11
Download Presentation
DC/DC Converter Update
122 Views
Download Presentation

DC/DC Converter Update

- - - - - - - - - - - - - - - - - - - - - - - - - - - E N D - - - - - - - - - - - - - - - - - - - - - - - - - - -
Presentation Transcript

  1. B2GM, 22 July 2012 DC/DC Converter Update Markus Friedl (HEPHY Vienna)

  2. Motivation: Belle II SVD • We can’t feed the full SVD with existing Kenwood power supplies using linear voltage regulators (as planned in TDR) •  OK with DC/DC converters Finesse Transmitter Board (FTB) FADC+PROC 1748APV25chips ~2mcoppercable Junctionbox ~10mcopper cable Unified opticaldata link (>20m) COPPER DC/DC converters Rad-hardvoltageregulators Front-endhybrids Analog level translation,datasparsificationandhit time reconstruction Unified Belle IIDAQ system M. Friedl (HEPHY Vienna): DC/DC Converter Update

  3. Introduction • General idea is similar to power grids: • transmit higher voltage at lower current to the front-end to minimize Ohmic cable loss • Please look at my slides from last B2GM for a general introduction and references • Indico Link M. Friedl (HEPHY Vienna): DC/DC Converter Update

  4. DC/DC R&D at CERN and Aachen • DC/DC is the baseline for an upgrade of the CMS experiment • CMS and ATLAS Tracker groups have been studying the use of DC/DC converters for future S-LHC upgrade • CERN Microelectronics group is developing rad-hard DC/DC converter ASICs and air coils • Intensive tests with existing CMS Tracker modules (APV25) and rad-hard DC/DC converter prototypes at Aachen • APV25 + DC/DC work together without noise penalty!  • See my previous presentation for details and references M. Friedl (HEPHY Vienna): DC/DC Converter Update

  5. ASIC: AMIS Family • Being developed since 2007 • AMIS5 (final) now produced, expected back in August 2012 Efficiency vs. Iout Efficiency vs. TID AMIS4 measurements 80…85% Rad-hard beyond 100Mrad Also tested: no SEB or SEGR M. Friedl (HEPHY Vienna): DC/DC Converter Update

  6. “SM01C” CERN DC/DC Module • Final AMIS chip not yet available, but substitute is • CERN group developed a DC/DC module (SM01C) based on commercial converter chip (LTC3605) with similar performance as AMIS, but not rad-hard • Optimized design & layout • Size: 28.4 x 13.5 mm2 • Shielded air core coil • Available for tests • Chip will later be replaced by rad-hard AMIS ASIC SM01C Converter Module M. Friedl (HEPHY Vienna): DC/DC Converter Update

  7. Meeting with CERN Developers • On 23-24 April, I met Federico Faccio and GeorgetBlanchot, the DC/DC developers, at CERN • I got a few SM01C DC/DC modules for tests • Final module costs (very approximately, for a few hundred): • Chip ~10€, packaging ~2€, PCB ~5€, components ~5€ • Shield: ?, air coil ~50€ (if made in industry) • Total per module: O(100€) • Remote voltage sensing not recommended (stability issue) • Better have slightly higher output voltage to allow cable drop • Possibility of redundancy (2 converters in parallel, 1 enabled) • To be confirmed by designers M. Friedl (HEPHY Vienna): DC/DC Converter Update

  8. Tests with SM01C DC/DC Modules • Junction box board with DC/DC converters to be placed in SVD DOCK boxes • 1 and 2 bare hybrid boards (without sensors) attached for tests with 2m final cable M. Friedl (HEPHY Vienna): DC/DC Converter Update

  9. Results: Noise Comparison • Same noise within measurement precision (few %) between conventional and DC/DC powering! Test hybrid (larger) Belle II design(smaller) M. Friedl (HEPHY Vienna): DC/DC Converter Update

  10. Results: Efficiency • Overall efficiency is 75% at Vin=10V with 2 hybrids load • 4 hybrids and lower Vin @ Belle II  higher efficiency (~85%) • Anyway more than enough for SVD purposes • Additional (small) improvement possible by larger coil M. Friedl (HEPHY Vienna): DC/DC Converter Update

  11. Summary & Outlook • Belle II SVD will use DC/DC converters to power front-end • Existing Kenwood power supplies are enough for future SVD • CERN is developing rad-hard converter ASIC • Final chip expected back in August • Meanwhile: drop-in based on commercial chip • Tested successfully with APV25 hybrids • No difference in noise • Efficiency of 75% obtained at Vin=10V and 2 hybrids load • ~85% expected in final configuration • Will continue tests with full detector modules M. Friedl (HEPHY Vienna): DC/DC Converter Update