1 / 84

K. Siva Kumar CEDT, IISc , Bangalore

Multilevel Voltage Space Vector Generation for Induction Motor Drives using Conventional Two-level Inverters and H-bridge cells. K. Siva Kumar CEDT, IISc , Bangalore. Overview of the presentation. Introduction Proposed three-level inverter scheme Experimental results

bgentry
Download Presentation

K. Siva Kumar CEDT, IISc , Bangalore

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Multilevel Voltage Space Vector Generation for Induction Motor Drives using Conventional Two-level Inverters and H-bridge cells K. Siva Kumar CEDT, IISc, Bangalore CEDT, Indian Institute of Science Bangalore

  2. Overview of the presentation • Introduction • Proposed three-level inverter scheme • Experimental results • Proposed Five-level inverter schemes • Experimental results • Conclusion CEDT, Indian Institute of Science Bangalore

  3. Introduction CEDT, Indian Institute of Science Bangalore

  4. The induction motor is called as a work horse of the industry • The induction motor requires a variable voltage magnitude and frequency to control the rotor speed Conventional two-level inverter CEDT, Indian Institute of Science Bangalore

  5. Normalized harmonics spectrum of pole voltage Inverter pole voltage (sine-triangle PWM) • The harmonic components in the inverter pole voltage are present at higher (switching) frequencies • The popular PWM control scheme is space vector pulse width modulation (SVPWM) technique • Space vector (Vr) is nothing but a resultant representation of all three phase voltage phasors and it is defined as CEDT, Indian Institute of Science Bangalore

  6. space vector diagram of conventional two-level inverter • The symbols ‘+’ and ‘-’ respectively indicate that the top switch and the bottom switch in a given phase leg are turned on • The conventional two-level inverter has to switch at higher frequencies to get a better harmonic profile at the inverter output voltage • But in high power applications, high switching frequency is generally not preferred because of the high switching losses and large dv/dt. CEDT, Indian Institute of Science Bangalore

  7. This dv/dt effect causes EMI problem in the motor and increases stress on the motor winding • To overcome these disadvantages, many multilevel inverter configurations and associated analysis of PWM techniques have been suggested • The most significant advantages of the multi-level inverters compared to two-level inverters • It is possible to use power semiconductor devices of lower voltage ratings to realize high voltage levels at inverter output • It is possible to obtain refined output voltage waveforms and reduced total harmonic distortion (THD) • It is possible to reduce the EMI problems by reducing the switching dv/dt CEDT, Indian Institute of Science Bangalore

  8. Multilevel Voltage Source Inverter One phase leg of general n-level inverter • The most popular topologies to realize the multilevel inverters are • Neutral Point Clamped (NPC) topology • Cascaded H-bridge (CHB) topology • Flying capacitor (FC) topology CEDT, Indian Institute of Science Bangalore

  9. Multi-level Inverter topologies feeding from one side of the induction motor NPC inverter FC inverter H-Bridge inverter CEDT, Indian Institute of Science Bangalore

  10. Multi-level inverters with open-end winding induction motor • The concept of multilevel inverters with open-end winding is introduced by H. Stemmler and P. Guggenbach in the year 1993 • The three-level inverter topology can be realized by feeding an open-end winding induction motor with two two-level inverter from both sides of the winding Three-level inverter topology for open-end winding induction motor CEDT, Indian Institute of Science Bangalore

  11. The triplen harmonic voltage introduced by the PWM inverters will cause triplen harmonic currents in the motor phase windings, because of the lake of isolated neutral • This topology requires either harmonic filter or isolated dc-link voltages to prevent triplen harmonic currents flowing through the motor phase windings • The dc-link voltage requirement for each inverter Vdc/2, which is half the dc-link voltage of conventional three-level inverter fed IM drive • But the radii of the combined voltage vector hexagon will be Vdc • This multilevel inverter topology is free from capacitor voltage balancing issues CEDT, Indian Institute of Science Bangalore

  12. Motivation • Many interesting multi level inverter topologies are proposed by various research groups across the world from industry and academic institutions • Apart from the conventional 3-level NPC and H-bridge topology, others are not yet highly preferred for general high and medium power drives applications • In this respect, two different five-level inverter topologies and one three-level inverter topology for high power induction motor drive applications are proposed CEDT, Indian Institute of Science Bangalore

  13. Part - 1 A Dual Two-Level Inverter scheme for a Four-Pole Induction Motor Drive with a single voltage source CEDT, Indian Institute of Science Bangalore

  14. Induction machine stator winding arrangement • Stator winding of an induction machine is an arrangement of conductors in the machine slots to produce nearly sinusoidal air gap MMF Four pole induction motor stator winding (full pitch) diagram • The conductors in the slots 1 to 3 and 19 to 21 should have the same voltage profile to produce identical magnetic poles • Similarly the conductor in the slots 10 to 12 and 28 to 30 should have the same voltage profile CEDT, Indian Institute of Science Bangalore

  15. In a four pole induction motor, two sets of identical voltage profile coils will be present in the total phase winding, at a phase displacement of 360o (electrical) • The identical voltage profile winding coils (or pole pair winding coils) in the stator winding will equally share the applied voltage vector Voltage vector distribution in the four pole induction machine winding CEDT, Indian Institute of Science Bangalore

  16. Modified four pole induction motor stator winding diagram • These identical voltage profile winding coils can be disconnected from a conventional four pole induction machine without any design change Coil connection after the identical pole pair winding disconnection CEDT, Indian Institute of Science Bangalore

  17. These two identical voltage profile coil groups can be connected in parallel instead of series, thereby the voltage vector Vr/2 is sufficient to drive the four pole induction motor with the same air gap flux profile • With this arrangement the dc-link voltage magnitude requirement will come down to half compared to the conventional arrangement • From the above discussion one can observe that, it is sufficient to feed the disconnected pole pair winding coils with the same fundamental voltage to get a performance similar to the conventional induction motor CEDT, Indian Institute of Science Bangalore

  18. Three-level voltage space vector generation for an open-end winding induction motor drive with single voltage source using decoupled space-vector PWM strategy Proposed three-level inverter with one active source for four-pole induction motor drive Cont.. CEDT, Indian Institute of Science Bangalore

  19. The two identical voltage profile, pole pair winding coils, in each phase of a four pole induction motor, is connected in two star groups • These two star connected winding coil groups are fed from two inverters • But these two inverters should produce the same fundamental voltage on the motor pole pair winding to generate uniform air gap flux • So a decoupled space-vector PWM scheme is used to drive the inverters • inverter-I and inverter-II are operated with a reference voltage space vector of Vr/2 and –Vr/2 CEDT, Indian Institute of Science Bangalore

  20. Space vector diagram of the two inverters Space vector diagram of three-level inverter CEDT, Indian Institute of Science Bangalore

  21. Timing distribution of the switching states for two inverters in one sampling interval • Using the decoupled PWM technique the voltage reference is equally divided in to two new reference vectors for two two-level inverters to generate the same fundamental voltage • In a switching time period Ts the voltage vectors OA and OA’ can be generated with a sequence of switching states 8-1-2-7 for inverter-I and 8’-5’-4’-7’ for inverter-II • The resultant switching sequence is 88’-15’-25’-24’-77’ CEDT, Indian Institute of Science Bangalore

  22. Similarly Maximum modulation index Resultant Phase voltage • The proposed topology is capable of producing a maximum phase voltage of 0.577Vdc in linear modulation with a single dc link voltage of Vdc/2 • So in the proposed scheme, the dc-bus utilization is increased by 15% compared to the earlier schemes presented with a single voltage source CEDT, Indian Institute of Science Bangalore

  23. Experimental results • The proposed topology are experimentally verified on a 5 H.P four pole induction motor (pole pair winding disconnected) drive • The drive is operated in open loop V/f control for different voltage reference covering the entire speed range • A decoupled space vector PWM scheme is used to generate the switching pulses • The inverter switching frequency is kept at 1 kHz for the entire speed range • The controller is implemented on TMS320F2812 DSP platform CEDT, Indian Institute of Science Bangalore

  24. Block diagram of V/f control scheme used for the proposed three-level inverter topology • The modulation index (M) given by the Vr/Vdc, so at the end of linear modulation M equal is to 0.866 CEDT, Indian Institute of Science Bangalore

  25. Experimental results for modulation index 0.4 (i.e. 20Hz operation) pole voltages [Y-axis: 100V/div] phase voltage [Y-axis: 200V/div] Phase currents [Y-axis: 2A/div, X-axis: 10ms/div] CKT DIG Normalized harmonic spectrum of the two inverters pole voltages CEDT, Indian Institute of Science Bangalore

  26. Phase voltage [Y-axis: 200V/div] common mode voltage [Y-axis: 100V/div] Effective phase voltage [Y-axis: 200V/div, X-axis: 10ms/div] phase currents effective phase current Normalized harmonic spectrum of the effective phase voltage • The first center band harmonics are completely eliminated CEDT, Indian Institute of Science Bangalore

  27. Experimental results for modulation index 0.8 (i.e. 40Hz operation) pole voltages [Y-axis: 100V/div] phase voltage [Y-axis: 200V/div] Phase currents [Y-axis: 2A/div, X-axis: 10ms/div] • The first centre band harmonics appear at 25 (1000Hz/40Hz) times the fundamental frequency • The isolated neutral presented in the proposed topology will not allow the triplen currents to flow through the motor phase windings Normalized harmonic spectrum of the two inverters pole voltages CEDT, Indian Institute of Science Bangalore

  28. Phase voltage [Y-axis: 200V/div] common mode voltage [Y-axis: 100V/div] Effective phase voltage [Y-axis: 200V/div, X-axis: 10ms/div] phase currents Normalized harmonic spectrum of the effective phase voltage effective phase current • The first center band harmonics are completely eliminated • the ripple content in the two currents are approximately equal in magnitude with opposite direction CEDT, Indian Institute of Science Bangalore

  29. Experimental results for over modulation pole voltages [Y-axis: 100V/div] phase voltage [Y-axis: 200V/div] Phase currents [Y-axis: 2A/div, X-axis: 10ms/div] • The first center band harmonics appear at approximately 21 (1000Hz/47Hz) times the fundamental frequency • Because of this square wave operation fifth and seventh harmonic will be presented in the inverter pole voltages Normalized harmonic spectrum of the two inverters pole voltages CEDT, Indian Institute of Science Bangalore

  30. Phase voltage [Y-axis: 200V/div] common mode voltage [Y-axis: 100V/div] Effective phase voltage [Y-axis: 200V/div, X-axis: 10ms/div] • From the above results it is clear that, for full modulation range the first center band harmonics are suppressed in the effective motor phase voltage Normalized harmonic spectrum of the effective phase voltage CEDT, Indian Institute of Science Bangalore

  31. Salient features • The identical voltage profile winding coils are disconnected and connected in two star groups • These star connected phase windings are fed from independently controlled inverters • The two inverters are fed from a single dc-link voltage source (The isolated neutrals provided by two star winding groups will not allow the triplen currents to flow through the motor phase windings) • The first center band harmonics are at two times the carrier frequency • The implementation of the proposed scheme does not necessitate any special design requirements for the induction motor • It can be extended to induction motor with number of poles more than four CEDT, Indian Institute of Science Bangalore

  32. Part - 2 A Five Level Inverter Scheme for a Four Pole Induction Motor Drive by Feeding the Identical Voltage Profile Windings from Both Sides CEDT, Indian Institute of Science Bangalore

  33. Proposed Five-level Inverter Power circuit • The advantages of the open-end winding structure along with identical voltage profile winding coils for a four pole induction motor are effectively utilized to realize multilevel structures using conventional two-level inverters CEDT, Indian Institute of Science Bangalore

  34. In the proposed topology, three isolated voltage source with a magnitude of Vdc/4 (where Vdc is the dc-bus voltage required for a conventional NPC three-level inverter) is used to deny the path for zero sequence currents • The switches S11 to S46, in the above figure, are part of the two level inverters which are fed from the voltage source magnitude of Vdc/4 • So the maximum voltage blocking capacity of the switches (labelled as Sxy, where x= 1 to 4 and y= 1 to 6) is Vdc/4 • With the proposed topology, it is possible to switch four two-level inverters independently and thereby each inverter will have eight switching states • Therefore a total of 4096 (8x8x8x8) switching combinations are possible, which are spread over 61 locations CEDT, Indian Institute of Science Bangalore

  35. Voltage space vector locations for a Five-level inverter • Note that each voltage level can be realized in a number of ways CEDT, Indian Institute of Science Bangalore

  36. All switching combinations for the five voltage levels for a-phase • Presently, the bi-directional switches S1 to S6 , in the power circuit, are assumed to be shorted CEDT, Indian Institute of Science Bangalore

  37. Schematic of possible voltage levels across the A-phase winding Voltage level at Vdc/2 Voltage level at Vdc/4 Voltage level at 0 Voltage level at -Vdc/4 Voltage level at -Vdc/2 • As mentioned above turning on the bidirectional switches (S1 to S6) permanently will cause a short circuit at the middle of motor phase windings CEDT, Indian Institute of Science Bangalore

  38. It will create an unequal voltage sharing between the same winding groups and this is explained using with switching state combinations 110 and 20-1 (a)Phase winding connection to the voltage sources for switching state 110 (b) Phase winding connection to the voltage sources for switching state 20-1 CEDT, Indian Institute of Science Bangalore

  39. From the Phase winding connection to the voltage sources for switching state 110, shown above, it can be observed that • One group of windings (i.e. A1-A2, B1-B2 and C1-C2) is fed from a voltage vector (110) and the other group of windings (i.e. A3-A4, B3-B4 and C3-C4) is fed from a zero voltage vector (000) • part of the A-phase and B-phase winding group (A1A2 & B1-B2) has a voltage of Vdc/4 across it and the other phase group has zero voltage across it • Similarly for switching state 20-1 it can be observed that, one group of windings (i.e. A1-A2, B1-B2 and C1-C2) is fed from a voltage vector (100) and the other group of windings (i.e. A3-A4, B3-B4 and C3-C4) is fed from a voltage vector (10-1) • However, for a four pole induction machine, two parts of the winding groups should have identical voltage profile for a uniform flux distribution • Therefore the present sequence with turning on the bidirectional switches will result in a distorted flux profile CEDT, Indian Institute of Science Bangalore

  40. (a) Phase winding connection to the voltage sources with equal voltage distribution across the phase winding groups for switching state 110 using the bidirectional switches. (b) Phase winding connection to the voltage sources with equal voltage distribution across the phase winding groups for switching state 20-1 using the bidirectional switches CEDT, Indian Institute of Science Bangalore

  41. Possible switching combinations • Based on the above considerations it is not possible to realize all the switching combinations presented in the above table CEDT, Indian Institute of Science Bangalore

  42. All the voltage vector locations inside the first and second innermost hexagon can be realized with the voltage levels ‘-1’, ‘0’ and ‘1’ • By using the switching state redundancy, it is possible to clamp inverter-2 and inverter-3 up to modulation index of 0.433 • Where the maximum radius of the reference voltage vector within the second innermost hexagon is achieved at a modulation index of 0.433 • Both the bi-directional switches, in corresponding phases, are completely turned off for the voltage levels ‘-1’, ‘0’ and ‘1’ • The bi-directional switches are also need not to switch up to the modulation index 0.433 like inverter-2 and inverter-3 • So in case of any switch failure in inverter-2 or inverter-3, the proposed five-level inverter can still be operated as a three-level inverter for lower modulation indices CEDT, Indian Institute of Science Bangalore

  43. voltage rating of the bidirectional switches Phase winding connection to the voltage sources for switching state 22-2, with bi-directional switches • the voltage equation for the loop (using Kirchhoff’s voltage Law) (B1 B2 X C2 C1 B1) • The maximum voltage across the switch is half the voltage difference between Vdc/4 and the difference between the back emf’s of two phases • Maximum voltage appears across the bidirectional switches is Vdc/8 CEDT, Indian Institute of Science Bangalore

  44. Switching strategy • Space vector pulse width modulation (SVPWM) technique is used to generate gating pulses for the proposed inverter • The voltage space vector reference (Vr*) can be generated from the motor speed requirement using V/f control • , where va,vbandvc are three phase voltages • The individual phase voltage references (va*,vb* and vc*) can be derived from voltage space vector • To have maximum utilization of dc-bus voltage, in linear modulation, an offset voltage is added to the three reference voltages • Voffset = -[max(va*,vb* and vc*) + min(va*,vb* and vc*)]/2 • van*= va*+Voffset CEDT, Indian Institute of Science Bangalore

  45. The A-phase reference voltage Van* modulation index (M= Vr/Vdc) equal to 0.8 • In actual experimental verification using a DSP it is difficult to generate four level shifted triangles CEDT, Indian Institute of Science Bangalore

  46. The modified A-phase reference voltage and triangle carriers • The voltage level required by the load is released by comparing the reference wave form with carrier wave • The switching state can be select from the above mentioned table CEDT, Indian Institute of Science Bangalore

  47. Experimental results • The proposed five-level inverter topology is experimentally verified on a 5hp four pole induction motor • The motor is run at no load condition to show the effect of changing PWM patterns on the motor current • Open loop V/f control is used to test the drive for the full modulation range • Throughout the speed range, the switching frequency is kept at 1 kHz • The controller is implemented in TMS320F2812 DSP platform • The gating signals generated from GAL22V10B CEDT, Indian Institute of Science Bangalore

  48. Block diagram of V/f control scheme used for the proposed five-level inverter topology CEDT, Indian Institute of Science Bangalore

  49. Experimental results for modulation index 0.2 (i.e. 10Hz operation) Total phase voltage voltage across the one phase winding coils phase current [X-axis: 20ms/div, Y-axis: 100V/div, 1A/div] • From the phase voltage it can be noted that, the proposed inverter is operating in two-level mode CEDT, Indian Institute of Science Bangalore

  50. Voltage between the point A2,A3 Inverter-1 pole voltage Inverter-4 pole voltage phase current [X-axis: 20ms/div, Y-axis: 100V/div, 1A/div] Voltage across the bidirectional switch • The inverter 1 and 4 are switching half of the period in a fundamental cycle • The negative and positive voltage peaks (across the bidirectional switch) are less than half of the inverter pole voltage peak • So the maximum voltage appear across the bidirectional switch is Vdc/8 CEDT, Indian Institute of Science Bangalore

More Related