1 / 16

Presentation Outline

Murat Guler ECE 8020 A Proposal Presentation: Rapid Prototyping of Component Based Systems Into Hybrid Data-Parallel/Sequential Implementations (November 13, 2003). Presentation Outline. Introduction Technical Approach High-Level, Component Based Modeling Low-Level, Hybrid Implementation

astra-parker
Download Presentation

Presentation Outline

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Murat GulerECE 8020 AProposal Presentation:Rapid Prototyping of Component Based Systems Into Hybrid Data-Parallel/Sequential Implementations(November 13, 2003)

  2. Presentation Outline • Introduction • Technical Approach • High-Level, Component Based Modeling • Low-Level, Hybrid Implementation • Example Application: JPEG • Simulation Results • Future Work Plan

  3. Introduction: SIMD Architectures http://www.ece.gatech.edu/research/pica

  4. Programming for SIMD • Currently • Hand coded • Architecture specific • Monolithic • Ideally • Compiler generated • Retargetable to different architectures • Hybrid

  5. Rapid Prototyping Approach Model Description Component- Based Model Assembly Code Research Compiler Architecture Implementation

  6. Component Based Modeling: Ptolemy http://ptolemy.eecs.berkeley.edu

  7. Multiple Dimensional Synchronous Dataflow Domain

  8. Low-Level Implementation:SIMPil Simulator • Stands for “SIMD Pixel Processor” • Was developed at Georgia Tech PICA Labs • Has focal-plane news-network structure • Enables taking performance measurements on running applications A. Gentile, H. H. Cat, and D. S. Wills, "The SIMD Pixel Processor (SIMPil): SIMPilSim Instruction-Level Simulator for Windows," Georgia Institute of Technology, PICA Research Group, Technical Report PICA-TR-1997-18, Atlanta, Georgia, 1997.

  9. Retargetable ZPL Language • Was developed at Georgia Tech EASL Labs • Retargets SIMD code to architectures with varying PPE ratios • Makes inter-PE communication transparent to the programmer • Generates code for the SIMPil simulator S. Sander, "Retargetable Compilation for Variable-Grain Data Parallel Execution in Image Processing," PhD. Thesis, Georgia Institute of Technology, August 2002.

  10. Hybrid Sequential & Data Parallel Approach • Data Parallel Phase • Regular SIMPil execution • Sequential Phase • One PE is chosen as sequential executor • All necessary data is transferred to that PE • All other PEs are put to sleep

  11. Example Application: JPEG Gregory K. Wallace, "The JPEG Still Picture Compression Standard," Communications of the ACM, vol. 34, No. 4, pp. 30 - 44, April 1991.

  12. Simulation Results:Speedup of the JPEG Algorithm

  13. Simulation Results:Total Memory Usage

  14. Simulation Results:Communication Cost Ratio

  15. Future Work Plan

  16. Questions? ? ? ?

More Related