1. ECM585Special Topics in Computer DesignLecture 0. Course Intro Prof. Taeweon Suh Computer Science Education Korea University

2. Course Information • Instructor • Prof. Taeweon Suh • Prerequisite • C-language • Computer Architecture • Textbook • Digital Design and Computer Architecture by David Money Harris and Sarah L. Harris, Morgan Kaufmann, 2007 (Required) • Office hours • After class as needed • Woo Dang Hall 503 by appointment • Contact Information • suhtw@korea.ac.kr • 02-3290-2397

3. Objectives • To learn how to design a computer, focusing on CPU design • Learn the hardware design flow • Learn Hardware Description Language (HDL) • Verilog-HDL • Refresh basic building blocks of digital logic design • Design basic building blocks with HDL • Refresh CPU pipeline • Design & simulate a CPU with HDL

4. Objectives Focus of this course CPU Main Memory (DDR2) FSB (Front-Side Bus) North Bridge DMI (Direct Media I/F) South Bridge

5. Grading Policy • Midterm Exam: 30% • Simulation & Modeling Assignments: 40% • In-class presentation: 30%

6. Hardware Design Flow Schematic-based design HDL-based design Computer Architect (modeling & simulation) Hardware Design with CAD tools Layout with CAD tools Focus of this course Fabricated Wafer Fabrication Packaging

7. Hardware Design Flow based on FPGA • FPGA: Field-Programmable Gate Array Schematic based design HDL-based design Computer Architect (modeling & simulation) Hardware Design with CAD tools Download An FPGA from Xilinx The same step as the previous one

8. Assignment #0 • Install a simulation tool, the ISE WebPACK from Xilinx • http://www.xilinx.com/ise/logic_design_prod/webpack.htm • The tool supports the FPGA design targeting Xilinx FPGAs • FPGA is Field-Programmable Gate Array. In other words, it is programmable hardware • But we still can use the tool for front-end design and test • Start to read the textbook