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Fundamentals of Microelectronics II. CH9 Cascode Stages and Current Mirrors CH10 Differential Amplifiers CH11 Frequency Response CH12 Feedback. Chapter 9 Cascode Stages and Current Mirrors. 9.1 Cascode Stage 9.2 Current Mirrors. Boosted Output Impedances. Bipolar Cascode Stage.

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fundamentals of microelectronics ii
Fundamentals of Microelectronics II
  • CH9 Cascode Stages and Current Mirrors
  • CH10 Differential Amplifiers
  • CH11 Frequency Response
  • CH12 Feedback
chapter 9 cascode stages and current mirrors
Chapter 9 Cascode Stages and Current Mirrors
  • 9.1 Cascode Stage
  • 9.2 Current Mirrors
boosted output impedances
Boosted Output Impedances

CH 9 Cascode Stages and Current Mirrors

bipolar cascode stage
Bipolar Cascode Stage

CH 9 Cascode Stages and Current Mirrors

maximum bipolar cascode output impedance
Maximum Bipolar Cascode Output Impedance
  • The maximum output impedance of a bipolar cascode is bounded by the ever-present r between emitter and ground of Q1.

CH 9 Cascode Stages and Current Mirrors

example output impedance
Example: Output Impedance
  • Typically r is smaller than rO, so in general it is impossible to double the output impedance by degenerating Q2 with a resistor.

CH 9 Cascode Stages and Current Mirrors

pnp cascode stage
PNP Cascode Stage

CH 9 Cascode Stages and Current Mirrors

another interpretation of bipolar cascode
Another Interpretation of Bipolar Cascode
  • Instead of treating cascode as Q2 degenerating Q1, we can also think of it as Q1 stacking on top of Q2 (current source) to boost Q2’s output impedance.

CH 9 Cascode Stages and Current Mirrors

false cascodes
False Cascodes
  • When the emitter of Q1 is connected to the emitter of Q2, it’s no longer a cascode since Q2 becomes a diode-connected device instead of a current source.

CH 9 Cascode Stages and Current Mirrors

mos cascode stage
MOS Cascode Stage

CH 9 Cascode Stages and Current Mirrors

another interpretation of mos cascode
Another Interpretation of MOS Cascode
  • Similar to its bipolar counterpart, MOS cascode can be thought of as stacking a transistor on top of a current source.
  • Unlike bipolar cascode, the output impedance is not limited by .

CH 9 Cascode Stages and Current Mirrors

pmos cascode stage
PMOS Cascode Stage

CH 9 Cascode Stages and Current Mirrors

example parasitic resistance
Example: Parasitic Resistance
  • RP will lower the output impedance, since its parallel combination with rO1 will always be lower than rO1.

CH 9 Cascode Stages and Current Mirrors

short circuit transconductance
Short-Circuit Transconductance
  • The short-circuit transconductance of a circuit measures its strength in converting input voltage to output current.

CH 9 Cascode Stages and Current Mirrors

transconductance example
Transconductance Example

CH 9 Cascode Stages and Current Mirrors

derivation of voltage gain
Derivation of Voltage Gain
  • By representing a linear circuit with its Norton equivalent, the relationship between Vout and Vin can be expressed by the product of Gm and Rout.

CH 9 Cascode Stages and Current Mirrors

example voltage gain
Example: Voltage Gain

CH 9 Cascode Stages and Current Mirrors

comparison between bipolar cascode and ce stage
Comparison between Bipolar Cascode and CE Stage
  • Since the output impedance of bipolar cascode is higher than that of the CE stage, we would expect its voltage gain to be higher as well.

CH 9 Cascode Stages and Current Mirrors

voltage gain of bipolar cascode amplifier
Voltage Gain of Bipolar Cascode Amplifier
  • Since rO is much larger than 1/gm, most of IC,Q1 flows into the diode-connected Q2. Using Rout as before, AV is easily calculated.

CH 9 Cascode Stages and Current Mirrors

alternate view of cascode amplifier
Alternate View of Cascode Amplifier
  • A bipolar cascode amplifier is also a CE stage in series with a CB stage.

CH 9 Cascode Stages and Current Mirrors

practical cascode stage
Practical Cascode Stage
  • Since no current source can be ideal, the output impedance drops.

CH 9 Cascode Stages and Current Mirrors

improved cascode stage
Improved Cascode Stage
  • In order to preserve the high output impedance, a cascode PNP current source is used.

CH 9 Cascode Stages and Current Mirrors

mos cascode amplifier
MOS Cascode Amplifier

CH 9 Cascode Stages and Current Mirrors

improved mos cascode amplifier
Improved MOS Cascode Amplifier
  • Similar to its bipolar counterpart, the output impedance of a MOS cascode amplifier can be improved by using a PMOS cascode current source.

CH 9 Cascode Stages and Current Mirrors

temperature and supply dependence of bias current
Temperature and Supply Dependence of Bias Current
  • Since VT, IS, n, and VTH all depend on temperature, I1 for both bipolar and MOS depends on temperature and supply.

CH 9 Cascode Stages and Current Mirrors

concept of current mirror
Concept of Current Mirror
  • The motivation behind a current mirror is to sense the current from a “golden current source” and duplicate this “golden current” to other locations.

CH 9 Cascode Stages and Current Mirrors

bipolar current mirror circuitry
Bipolar Current Mirror Circuitry
  • The diode-connected QREF produces an output voltage V1 that forces Icopy1 = IREF, if Q1 = QREF.

CH 9 Cascode Stages and Current Mirrors

bad current mirror example i
Bad Current Mirror Example I
  • Without shorting the collector and base of QREF together, there will not be a path for the base currents to flow, therefore, Icopy is zero.

CH 9 Cascode Stages and Current Mirrors

bad current mirror example ii
Bad Current Mirror Example II
  • Although a path for base currents exists, this technique of biasing is no better than resistive divider.

CH 9 Cascode Stages and Current Mirrors

multiple copies of i ref
Multiple Copies of IREF
  • Multiple copies of IREF can be generated at different locations by simply applying the idea of current mirror to more transistors.

CH 9 Cascode Stages and Current Mirrors

current scaling
Current Scaling
  • By scaling the emitter area of Qj n times with respect to QREF, Icopy,j is also n times larger than IREF. This is equivalent to placing n unit-size transistors in parallel.

CH 9 Cascode Stages and Current Mirrors

example scaled current
Example: Scaled Current

CH 9 Cascode Stages and Current Mirrors

fractional scaling
Fractional Scaling
  • A fraction of IREF can be created on Q1 by scaling up the emitter area of QREF.

CH 9 Cascode Stages and Current Mirrors

example different mirroring ratio
Example: Different Mirroring Ratio
  • Using the idea of current scaling and fractional scaling, Icopy2 is 0.5mA and Icopy1 is 0.05mA respectively. All coming from a source of 0.2mA.

CH 9 Cascode Stages and Current Mirrors

mirroring error due to base currents
Mirroring Error Due to Base Currents

CH 9 Cascode Stages and Current Mirrors

improved mirroring accuracy
Improved Mirroring Accuracy
  • Because of QF, the base currents of QREF and Q1 are mostly supplied by QF rather than IREF. Mirroring error is reduced  times.

CH 9 Cascode Stages and Current Mirrors

example different mirroring ratio accuracy
Example: Different Mirroring Ratio Accuracy

CH 9 Cascode Stages and Current Mirrors

pnp current mirror
PNP Current Mirror
  • PNP current mirror is used as a current source load to an NPN amplifier stage.

CH 9 Cascode Stages and Current Mirrors

generation of i ref for pnp current mirror
Generation of IREF for PNP Current Mirror

CH 9 Cascode Stages and Current Mirrors

example current mirror with discrete devices
Example: Current Mirror with Discrete Devices
  • Let QREF and Q1 be discrete NPN devices. IREF and Icopy1 can vary in large magnitude due to IS mismatch.

CH 9 Cascode Stages and Current Mirrors

mos current mirror
MOS Current Mirror
  • The same concept of current mirror can be applied to MOS transistors as well.

CH 9 Cascode Stages and Current Mirrors

bad mos current mirror example
Bad MOS Current Mirror Example
  • This is not a current mirror since the relationship between VX and IREF is not clearly defined.
  • The only way to clearly define VX with IREF is to use a diode-connected MOS since it provides square-law I-V relationship.

CH 9 Cascode Stages and Current Mirrors

example current scaling
Example: Current Scaling
  • Similar to their bipolar counterpart, MOS current mirrors can also scale IREF up or down (I1 = 0.2mA, I2 = 0.5mA).

CH 9 Cascode Stages and Current Mirrors

cmos current mirror
CMOS Current Mirror
  • The idea of combining NMOS and PMOS to produce CMOS current mirror is shown above.

CH 9 Cascode Stages and Current Mirrors

chapter 10 differential amplifiers
Chapter 10 Differential Amplifiers
  • 10.1 General Considerations
  • 10.2 Bipolar Differential Pair
  • 10.3 MOS Differential Pair
  • 10.4 Cascode Differential Amplifiers
  • 10.5 Common-Mode Rejection
  • 10.6 Differential Pair with Active Load
audio amplifier example
Audio Amplifier Example
  • An audio amplifier is constructed above that takes on a rectified AC voltage as its supply and amplifies an audio signal from a microphone.

CH 10 Differential Amplifiers

humming noise in audio amplifier example
“Humming” Noise in Audio Amplifier Example
  • However, VCC contains a ripple from rectification that leaks to the output and is perceived as a “humming” noise by the user.

CH 10 Differential Amplifiers

supply ripple rejection
Supply Ripple Rejection
  • Since both node X and Y contain the ripple, their difference will be free of ripple.

CH 10 Differential Amplifiers

ripple free differential output
Ripple-Free Differential Output
  • Since the signal is taken as a difference between two nodes, an amplifier that senses differential signals is needed.

CH 10 Differential Amplifiers

common inputs to differential amplifier
Common Inputs to Differential Amplifier
  • Signals cannot be applied in phase to the inputs of a differential amplifier, since the outputs will also be in phase, producing zero differential output.

CH 10 Differential Amplifiers

differential inputs to differential amplifier
Differential Inputs to Differential Amplifier
  • When the inputs are applied differentially, the outputs are 180° out of phase; enhancing each other when sensed differentially.

CH 10 Differential Amplifiers

differential signals
Differential Signals
  • A pair of differential signals can be generated, among other ways, by a transformer.
  • Differential signals have the property that they share the same average value to ground and are equal in magnitude but opposite in phase.

CH 10 Differential Amplifiers

single ended vs differential signals
Single-ended vs. Differential Signals

CH 10 Differential Amplifiers

differential pair
Differential Pair
  • With the addition of a tail current, the circuits above operate as an elegant, yet robust differential pair.

CH 10 Differential Amplifiers

common mode response
Common-Mode Response

CH 10 Differential Amplifiers

common mode rejection
Common-Mode Rejection
  • Due to the fixed tail current source, the input common-mode value can vary without changing the output common-mode value.

CH 10 Differential Amplifiers

differential response i
Differential Response I

CH 10 Differential Amplifiers

differential response ii
Differential Response II

CH 10 Differential Amplifiers

differential pair characteristics
Differential Pair Characteristics
  • None-zero differential input produces variations in output currents and voltages, whereas common-mode input produces no variations.

CH 10 Differential Amplifiers

small signal analysis
Small-Signal Analysis
  • Since the input to Q1 and Q2 rises and falls by the same amount, and their bases are tied together, the rise in IC1 has the same magnitude as the fall in IC2.

CH 10 Differential Amplifiers

virtual ground
Virtual Ground
  • For small changes at inputs, the gm’s are the same, and the respective increase and decrease of IC1 and IC2 are the same, node P must stay constant to accommodate these changes. Therefore, node P can be viewed as AC ground.

CH 10 Differential Amplifiers

small signal differential gain
Small-Signal Differential Gain
  • Since the output changes by -2gmVRC and input by 2V, the small signal gain is –gmRC, similar to that of the CE stage. However, to obtain same gain as the CE stage, power dissipation is doubled.

CH 10 Differential Amplifiers

large signal analysis
Large Signal Analysis

CH 10 Differential Amplifiers

input output characteristics
Input/Output Characteristics

CH 10 Differential Amplifiers

linear nonlinear regions
Linear/Nonlinear Regions
  • The left column operates in linear region, whereas the right column operates in nonlinear region.

CH 10 Differential Amplifiers

small signal model
Small-Signal Model

CH 10 Differential Amplifiers

half circuits
Half Circuits
  • Since VP is grounded, we can treat the differential pair as two CE “half circuits”, with its gain equal to one half circuit’s single-ended gain.

CH 10 Differential Amplifiers

example differential gain
Example: Differential Gain

CH 10 Differential Amplifiers

extension of virtual ground
Extension of Virtual Ground
  • It can be shown that if R1 = R2, and points A and B go up and down by the same amount respectively, VX does not move.

CH 10 Differential Amplifiers

half circuit example i
Half Circuit Example I

CH 10 Differential Amplifiers

half circuit example ii
Half Circuit Example II

CH 10 Differential Amplifiers

half circuit example iii
Half Circuit Example III

CH 10 Differential Amplifiers

half circuit example iv
Half Circuit Example IV

CH 10 Differential Amplifiers

mos differential pair s common mode response
MOS Differential Pair’s Common-Mode Response
  • Similar to its bipolar counterpart, MOS differential pair produces zero differential output as VCM changes.

CH 10 Differential Amplifiers

equilibrium overdrive voltage
Equilibrium Overdrive Voltage
  • The equilibrium overdrive voltage is defined as the overdrive voltage seen by M1 and M2 when both of them carry a current of ISS/2.

CH 10 Differential Amplifiers

minimum common mode output voltage
Minimum Common-mode Output Voltage
  • In order to maintain M1 and M2 in saturation, the common-mode output voltage cannot fall below the value above.
  • This value usually limits voltage gain.

CH 10 Differential Amplifiers

differential response
Differential Response

CH 10 Differential Amplifiers

small signal response
Small-Signal Response
  • Similar to its bipolar counterpart, the MOS differential pair exhibits the same virtual ground node and small signal gain.

CH 10 Differential Amplifiers

power and gain tradeoff
Power and Gain Tradeoff
  • In order to obtain the source gain as a CS stage, a MOS differential pair must dissipate twice the amount of current. This power and gain tradeoff is also echoed in its bipolar counterpart.

CH 10 Differential Amplifiers

maximum differential input voltage
Maximum Differential Input Voltage
  • There exists a finite differential input voltage that completely steers the tail current from one transistor to the other. This value is known as the maximum differential input voltage.

CH 10 Differential Amplifiers

contrast between mos and bipolar differential pairs
Contrast Between MOS and Bipolar Differential Pairs
  • In a MOS differential pair, there exists a finite differential input voltage to completely switch the current from one transistor to the other, whereas, in a bipolar pair that voltage is infinite.

CH 10 Differential Amplifiers

the effects of doubling the tail current
The effects of Doubling the Tail Current
  • Since ISS is doubled and W/L is unchanged, the equilibrium overdrive voltage for each transistor must increase by to accommodate this change, thus Vin,max increases by as well. Moreover, since ISS is doubled, the differential output swing will double.

CH 10 Differential Amplifiers

the effects of doubling w l
The effects of Doubling W/L
  • Since W/L is doubled and the tail current remains unchanged, the equilibrium overdrive voltage will be lowered by to accommodate this change, thus Vin,max will be lowered by as well. Moreover, the differential output swing will remain unchanged since neither ISS nor RD has changed

CH 10 Differential Amplifiers

small signal analysis of mos differential pair
Small-Signal Analysis of MOS Differential Pair
  • When the input differential signal is small compared to 4ISS/nCox(W/L), the output differential current is linearly proportional to it, and small-signal model can be applied.

CH 10 Differential Amplifiers

virtual ground and half circuit
Virtual Ground and Half Circuit
  • Applying the same analysis as the bipolar case, we will arrive at the same conclusion that node P will not move for small input signals and the concept of half circuit can be used to calculate the gain.

CH 10 Differential Amplifiers

bipolar cascode differential pair
Bipolar Cascode Differential Pair

CH 10 Differential Amplifiers

bipolar telescopic cascode
Bipolar Telescopic Cascode

CH 10 Differential Amplifiers

mos cascode differential pair
MOS Cascode Differential Pair

CH 10 Differential Amplifiers

mos telescopic cascode
MOS Telescopic Cascode

CH 10 Differential Amplifiers

effect of finite tail impedance
Effect of Finite Tail Impedance
  • If the tail current source is not ideal, then when a input CM voltage is applied, the currents in Q1 and Q2 and hence output CM voltage will change.

CH 10 Differential Amplifiers

input cm noise with ideal tail current
Input CM Noise with Ideal Tail Current

CH 10 Differential Amplifiers

input cm noise with non ideal tail current
Input CM Noise with Non-ideal Tail Current

CH 10 Differential Amplifiers

comparison
Comparison
  • As it can be seen, the differential output voltages for both cases are the same. So for small input CM noise, the differential pair is not affected.

CH 10 Differential Amplifiers

cm to dm conversion a cm dm
CM to DM Conversion, ACM-DM
  • If finite tail impedance and asymmetry are both present, then the differential output signal will contain a portion of input common-mode signal.

CH 10 Differential Amplifiers

example a cm dm
Example: ACM-DM

CH 10 Differential Amplifiers

slide102
CMRR
  • CMRR defines the ratio of wanted amplified differential input signal to unwanted converted input common-mode noise that appears at the output.

CH 10 Differential Amplifiers

differential to single ended conversion
Differential to Single-ended Conversion
  • Many circuits require a differential to single-ended conversion, however, the above topology is not very good.

CH 10 Differential Amplifiers

supply noise corruption
Supply Noise Corruption
  • The most critical drawback of this topology is supply noise corruption, since no common-mode cancellation mechanism exists. Also, we lose half of the signal.

CH 10 Differential Amplifiers

better alternative
Better Alternative
  • This circuit topology performs differential to single-ended conversion with no loss of gain.

CH 10 Differential Amplifiers

active load
Active Load
  • With current mirror used as the load, the signal current produced by the Q1 can be replicated onto Q4.
  • This type of load is different from the conventional “static load” and is known as an “active load”.

CH 10 Differential Amplifiers

differential pair with active load
Differential Pair with Active Load
  • The input differential pair decreases the current drawn from RL by I and the active load pushes an extra I into RL by current mirror action; these effects enhance each other.

CH 10 Differential Amplifiers

active load vs static load
Active Load vs. Static Load
  • The load on the left responds to the input signal and enhances the single-ended output, whereas the load on the right does not.

CH 10 Differential Amplifiers

mos differential pair with active load
MOS Differential Pair with Active Load
  • Similar to its bipolar counterpart, MOS differential pair can also use active load to enhance its single-ended output.

CH 10 Differential Amplifiers

asymmetric differential pair
Asymmetric Differential Pair
  • Because of the vastly different resistance magnitude at the drains of M1 and M2, the voltage swings at these two nodes are different and therefore node P cannot be viewed as a virtual ground.

CH 10 Differential Amplifiers

thevenin equivalent of the input pair
Thevenin Equivalent of the Input Pair

CH 10 Differential Amplifiers

proof of v a v out

A

I

Proof of VA << Vout

CH 10 Differential Amplifiers

chapter 11 frequency response
Chapter 11 Frequency Response

11.1 Fundamental Concepts

11.2 High-Frequency Models of Transistors

11.3 Analysis Procedure

11.4 Frequency Response of CE and CS Stages

11.5 Frequency Response of CB and CG Stages

11.6 Frequency Response of Followers

11.7 Frequency Response of Cascode Stage

11.8 Frequency Response of Differential Pairs

11.9 Additional Examples

CH 10 Differential Amplifiers

114

chapter outline
Chapter Outline

CH 10 Differential Amplifiers

CH 11 Frequency Response

115

high frequency roll off of amplifier
High Frequency Roll-off of Amplifier

As frequency of operation increases, the gain of amplifier decreases. This chapter analyzes this problem.

CH 10 Differential Amplifiers

CH 11 Frequency Response

116

example human voice i
Example: Human Voice I

Natural Voice

Telephone System

CH 10 Differential Amplifiers

Natural human voice spans a frequency range from 20Hz to 20KHz, however conventional telephone system passes frequencies from 400Hz to 3.5KHz. Therefore phone conversation differs from face-to-face conversation.

CH 11 Frequency Response

117

example human voice ii
Example: Human Voice II

Path traveled by the human voice to the voice recorder

Mouth

Air

Recorder

Path traveled by the human voice to the human ear

Mouth

Air

Ear

Skull

  • Since the paths are different, the results will also be different.

CH 10 Differential Amplifiers

CH 11 Frequency Response

118

example video signal
Example: Video Signal

High Bandwidth

Low Bandwidth

CH 10 Differential Amplifiers

Video signals without sufficient bandwidth become fuzzy as they fail to abruptly change the contrast of pictures from complete white into complete black.

CH 11 Frequency Response

119

gain roll off simple low pass filter
Gain Roll-off: Simple Low-pass Filter

CH 10 Differential Amplifiers

In this simple example, as frequency increases the impedance of C1 decreases and the voltage divider consists of C1 and R1 attenuates Vin to a greater extent at the output.

CH 11 Frequency Response

120

gain roll off common source
Gain Roll-off: Common Source

The capacitive load, CL, is the culprit for gain roll-off since at high frequency, it will “steal” away some signal current and shunt it to ground.

CH 10 Differential Amplifiers

CH 11 Frequency Response

121

frequency response of the cs stage
Frequency Response of the CS Stage

At low frequency, the capacitor is effectively open and the gain is flat. As frequency increases, the capacitor tends to a short and the gain starts to decrease. A special frequency is ω=1/(RDCL), where the gain drops by 3dB.

CH 10 Differential Amplifiers

CH 11 Frequency Response

122

example figure of merit
Example: Figure of Merit

This metric quantifies a circuit’s gain, bandwidth, and power dissipation. In the bipolar case, low temperature, supply, and load capacitance mark a superior figure of merit.

CH 10 Differential Amplifiers

CH 11 Frequency Response

123

example relationship between frequency response and step response
Example: Relationship between Frequency Response and Step Response
  • The relationship is such that as R1C1 increases, the bandwidth drops and the step response becomes slower.

CH 10 Differential Amplifiers

CH 11 Frequency Response

124

bode plot
Bode Plot

When we hit a zero, ωzj, the Bode magnitude rises with a slope of +20dB/dec.

When we hit a pole, ωpj, the Bode magnitude falls with a slope of -20dB/dec

CH 10 Differential Amplifiers

CH 11 Frequency Response

125

example bode plot
Example: Bode Plot

The circuit only has one pole (no zero) at 1/(RDCL), so the slope drops from 0 to -20dB/dec as we pass ωp1.

CH 10 Differential Amplifiers

CH 11 Frequency Response

126

pole identification example i
Pole Identification Example I

CH 10 Differential Amplifiers

CH 11 Frequency Response

127

pole identification example ii
Pole Identification Example II

CH 10 Differential Amplifiers

CH 11 Frequency Response

128

circuit with floating capacitor
Circuit with Floating Capacitor

The pole of a circuit is computed by finding the effective resistance and capacitance from a node to GROUND.

The circuit above creates a problem since neither terminal of CF is grounded.

CH 10 Differential Amplifiers

CH 11 Frequency Response

129

miller s theorem
Miller’s Theorem

If Av is the gain from node 1 to 2, then a floating impedance ZF can be converted to two grounded impedances Z1 and Z2.

CH 10 Differential Amplifiers

CH 11 Frequency Response

130

miller multiplication
Miller Multiplication

With Miller’s theorem, we can separate the floating capacitor. However, the input capacitor is larger than the original floating capacitor. We call this Miller multiplication.

CH 10 Differential Amplifiers

CH 11 Frequency Response

131

example miller theorem
Example: Miller Theorem

CH 10 Differential Amplifiers

CH 11 Frequency Response

132

high pass filter response
High-Pass Filter Response
  • The voltage division between a resistor and a capacitor can be configured such that the gain at low frequency is reduced.

CH 10 Differential Amplifiers

CH 11 Frequency Response

133

example audio amplifier
Example: Audio Amplifier
  • In order to successfully pass audio band frequencies (20 Hz-20 KHz), large input and output capacitances are needed.

CH 10 Differential Amplifiers

CH 11 Frequency Response

134

capacitive coupling vs direct coupling
Capacitive Coupling vs. Direct Coupling

Capacitive coupling, also known as AC coupling, passes AC signals from Y to X while blocking DC contents.

This technique allows independent bias conditions between stages. Direct coupling does not.

Direct Coupling

Capacitive Coupling

CH 10 Differential Amplifiers

CH 11 Frequency Response

135

typical frequency response
Typical Frequency Response

Lower Corner

Upper Corner

CH 10 Differential Amplifiers

CH 11 Frequency Response

136

high frequency bipolar model
High-Frequency Bipolar Model

At high frequency, capacitive effects come into play. Cb represents the base charge, whereas C and Cje are the junction capacitances.

CH 10 Differential Amplifiers

CH 11 Frequency Response

137

high frequency model of integrated bipolar transistor
High-Frequency Model of Integrated Bipolar Transistor

Since an integrated bipolar circuit is fabricated on top of a substrate, another junction capacitance exists between the collector and substrate, namely CCS.

CH 10 Differential Amplifiers

CH 11 Frequency Response

138

example capacitance identification
Example: Capacitance Identification

CH 10 Differential Amplifiers

CH 11 Frequency Response

139

mos intrinsic capacitances
MOS Intrinsic Capacitances

For a MOS, there exist oxide capacitance from gate to channel, junction capacitances from source/drain to substrate, and overlap capacitance from gate to source/drain.

CH 10 Differential Amplifiers

CH 11 Frequency Response

140

gate oxide capacitance partition and full model
Gate Oxide Capacitance Partition and Full Model

The gate oxide capacitance is often partitioned between source and drain. In saturation, C2~ Cgate, and C1 ~ 0. They are in parallel with the overlap capacitance to form CGS and CGD.

CH 10 Differential Amplifiers

CH 11 Frequency Response

141

example capacitance identification142
Example: Capacitance Identification

CH 10 Differential Amplifiers

CH 11 Frequency Response

142

transit frequency
Transit Frequency

Transit frequency, fT, is defined as the frequency where the current gain from input to output drops to 1.

CH 10 Differential Amplifiers

CH 11 Frequency Response

143

example transit frequency calculation
Example: Transit Frequency Calculation

CH 10 Differential Amplifiers

CH 11 Frequency Response

144

analysis summary
Analysis Summary

The frequency response refers to the magnitude of the transfer function.

Bode’s approximation simplifies the plotting of the frequency response if poles and zeros are known.

In general, it is possible to associate a pole with each node in the signal path.

Miller’s theorem helps to decompose floating capacitors into grounded elements.

Bipolar and MOS devices exhibit various capacitances that limit the speed of circuits.

CH 10 Differential Amplifiers

CH 11 Frequency Response

145

high frequency circuit analysis procedure
High Frequency Circuit Analysis Procedure

Determine which capacitor impact the low-frequency region of the response and calculate the low-frequency pole (neglect transistor capacitance).

Calculate the midband gain by replacing the capacitors with short circuits (neglect transistor capacitance).

Include transistor capacitances.

Merge capacitors connected to AC grounds and omit those that play no role in the circuit.

Determine the high-frequency poles and zeros.

Plot the frequency response using Bode’s rules or exact analysis.

CH 10 Differential Amplifiers

CH 11 Frequency Response

146

frequency response of cs stage with bypassed degeneration
Frequency Response of CS Stagewith Bypassed Degeneration
  • In order to increase the midband gain, a capacitor Cb is placed in parallel with Rs.
  • The pole frequency must be well below the lowest signal frequency to avoid the effect of degeneration.

CH 10 Differential Amplifiers

CH 11 Frequency Response

147

unified model for ce and cs stages
Unified Model for CE and CS Stages

CH 10 Differential Amplifiers

CH 11 Frequency Response

148

unified model using miller s theorem
Unified Model Using Miller’s Theorem

CH 10 Differential Amplifiers

CH 11 Frequency Response

149

example ce stage
Example: CE Stage
  • The input pole is the bottleneck for speed.

CH 10 Differential Amplifiers

CH 11 Frequency Response

150

example half width cs stage
Example: Half Width CS Stage

CH 10 Differential Amplifiers

CH 11 Frequency Response

151

direct analysis of ce and cs stages
Direct Analysis of CE and CS Stages

Direct analysis yields different pole locations and an extra zero.

CH 10 Differential Amplifiers

CH 11 Frequency Response

152

example ce and cs direct analysis
Example: CE and CS Direct Analysis

CH 10 Differential Amplifiers

CH 11 Frequency Response

153

example comparison between different methods
Example: Comparison Between Different Methods

Dominant Pole

Exact

Miller’s

CH 10 Differential Amplifiers

CH 11 Frequency Response

154

input impedance of ce and cs stages
Input Impedance of CE and CS Stages

CH 10 Differential Amplifiers

CH 11 Frequency Response

155

low frequency response of cb and cg stages
Low Frequency Response of CB and CG Stages
  • As with CE and CS stages, the use of capacitive coupling leads to low-frequency roll-off in CB and CG stages (although a CB stage is shown above, a CG stage is similar).

CH 10 Differential Amplifiers

CH 11 Frequency Response

156

frequency response of cb stage
Frequency Response of CB Stage

CH 10 Differential Amplifiers

CH 11 Frequency Response

157

frequency response of cg stage
Frequency Response of CG Stage

Similar to a CB stage, the input pole is on the order of fT, so rarely a speed bottleneck.

CH 10 Differential Amplifiers

CH 11 Frequency Response

158

example cg stage pole identification
Example: CG Stage Pole Identification

CH 10 Differential Amplifiers

CH 11 Frequency Response

159

example frequency response of cg stage
Example: Frequency Response of CG Stage

CH 10 Differential Amplifiers

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emitter and source followers
Emitter and Source Followers

The following will discuss the frequency response of emitter and source followers using direct analysis.

Emitter follower is treated first and source follower is derived easily by allowing r to go to infinity.

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direct analysis of emitter follower
Direct Analysis of Emitter Follower

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direct analysis of source follower stage
Direct Analysis of Source Follower Stage

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example frequency response of source follower
Example: Frequency Response of Source Follower

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example source follower
Example: Source Follower

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input capacitance of emitter source follower
Input Capacitance of Emitter/Source Follower

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example source follower input capacitance
Example: Source Follower Input Capacitance

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output impedance of emitter follower
Output Impedance of Emitter Follower

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output impedance of source follower
Output Impedance of Source Follower

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active inductor
Active Inductor

The plot above shows the output impedance of emitter and source followers. Since a follower’s primary duty is to lower the driving impedance (RS>1/gm), the “active inductor” characteristic on the right is usually observed.

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example output impedance171
Example: Output Impedance

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frequency response of cascode stage
Frequency Response of Cascode Stage

For cascode stages, there are three poles and Miller multiplication is smaller than in the CE/CS stage.

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poles of bipolar cascode
Poles of Bipolar Cascode

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poles of mos cascode
Poles of MOS Cascode

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example frequency response of cascode
Example: Frequency Response of Cascode

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mos cascode example
MOS Cascode Example

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i o impedance of bipolar cascode
I/O Impedance of Bipolar Cascode

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i o impedance of mos cascode
I/O Impedance of MOS Cascode

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bipolar differential pair frequency response
Bipolar Differential Pair Frequency Response

Since bipolar differential pair can be analyzed using half-circuit, its transfer function, I/O impedances, locations of poles/zeros are the same as that of the half circuit’s.

Half Circuit

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mos differential pair frequency response
MOS Differential Pair Frequency Response

Since MOS differential pair can be analyzed using half-circuit, its transfer function, I/O impedances, locations of poles/zeros are the same as that of the half circuit’s.

Half Circuit

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example mos differential pair
Example: MOS Differential Pair

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common mode frequency response
Common Mode Frequency Response
  • Css will lower the total impedance between point P to ground at high frequency, leading to higher CM gain which degrades the CM rejection ratio.

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tail node capacitance contribution
Tail Node Capacitance Contribution
  • Source-Body Capacitance of M1, M2 and M3
  • Gate-Drain Capacitance of M3

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example capacitive coupling
Example: Capacitive Coupling

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example ic amplifier low frequency design
Example: IC Amplifier – Low Frequency Design

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example ic amplifier midband design
Example: IC Amplifier – Midband Design

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example ic amplifier high frequency design
Example: IC Amplifier – High Frequency Design

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chapter 12 feedback
Chapter 12 Feedback
  • 12.1 General Considerations
  • 12.2 Types of Amplifiers
  • 12.3 Sense and Return Techniques
  • 12.4 Polarity of Feedback
  • 12.5 Feedback Topologies
  • 12.6 Effect of Finite I/O Impedances
  • 12.7 Stability in Feedback Systems
negative feedback system
Negative Feedback System
  • A negative feedback system consists of four components: 1) feedforward system, 2) sense mechanism, 3) feedback network, and 4) comparison mechanism.

CH 12 Feedback

feedback example
Feedback Example
  • A1 is the feedforward network, R1 and R2 provide the sensing and feedback capabilities, and comparison is provided by differential input of A1.

CH 12 Feedback

comparison error

E

Comparison Error
  • As A1K increases, the error between the input and fed back signal decreases. Or the fed back signal approaches a good replica of the input.

CH 12 Feedback

comparison error193
Comparison Error

CH 12 Feedback

loop gain
Loop Gain
  • When the input is grounded, and the loop is broken at an arbitrary location, the loop gain is measured to be KA1.

CH 12 Feedback

incorrect calculation of loop gain
Incorrect Calculation of Loop Gain
  • Signal naturally flows from the input to the output of a feedforward/feedback system. If we apply the input the other way around, the “output” signal we get is not a result of the loop gain, but due to poor isolation.

CH 12 Feedback

gain desensitization
Gain Desensitization
  • A large loop gain is needed to create a precise gain, one that does not depend on A1, which can vary by ±20%.

CH 12 Feedback

ratio of resistors
Ratio of Resistors
  • When two resistors are composed of the same unit resistor, their ratio is very accurate. Since when they vary, they will vary together and maintain a constant ratio.

CH 12 Feedback

merits of negative feedback
Merits of Negative Feedback
  • 1) Bandwidth enhancement
  • 2) Modification of I/O Impedances
  • 3) Linearization

CH 12 Feedback

bandwidth enhancement

Closed Loop

Open Loop

Negative

Feedback

Bandwidth Enhancement
  • Although negative feedback lowers the gain by (1+KA0), it also extends the bandwidth by the same amount.

CH 12 Feedback

bandwidth extension example
Bandwidth Extension Example
  • As the loop gain increases, we can see the decrease of the overall gain and the extension of the bandwidth.

CH 12 Feedback

example load desensitization
Example: Load Desensitization

With Feedback

Small Difference

W/O Feedback

Large Difference

CH 12 Feedback

linearization

Before feedback

After feedback

Linearization

CH 12 Feedback

sensing a voltage
Sensing a Voltage
  • In order to sense a voltage across two terminals, a voltmeter with ideally infinite impedance is used.

CH 12 Feedback

sensing and returning a voltage

Feedback

Network

Sensing and Returning a Voltage
  • Similarly, for a feedback network to correctly sense the output voltage, its input impedance needs to be large.
  • R1 and R2 also provide a mean to return the voltage.

CH 12 Feedback

sensing a current
Sensing a Current
  • A current is measured by inserting a current meter with ideally zero impedance in series with the conduction path.
  • The current meter is composed of a small resistance r in parallel with a voltmeter.

CH 12 Feedback

sensing and returning a current

Feedback

Network

Sensing and Returning a Current
  • Similarly for a feedback network to correctly sense the current, its input impedance has to be small.
  • RS has to be small so that its voltage drop will not change Iout.

CH 12 Feedback

addition of two voltage sources

Feedback

Network

Addition of Two Voltage Sources
  • In order to add or substrate two voltage sources, we place them in series. So the feedback network is placed in series with the input source.

CH 12 Feedback

practical circuits to subtract two voltage sources
Practical Circuits to Subtract Two Voltage Sources
  • Although not directly in series, Vin and VF are being subtracted since the resultant currents, differential and single-ended, are proportional to the difference of Vin and VF.

CH 12 Feedback

addition of two current sources

Feedback

Network

Addition of Two Current Sources
  • In order to add two current sources, we place them in parallel. So the feedback network is placed in parallel with the input signal.

CH 12 Feedback

practical circuits to subtract two current sources
Practical Circuits to Subtract Two Current Sources
  • Since M1 and RF are in parallel with the input current source, their respective currents are being subtracted. Note, RF has to be large enough to approximate a current source.

CH 12 Feedback

example sense and return
Example: Sense and Return
  • R1 and R2 sense and return the output voltage to feedforward network consisting of M1- M4.
  • M1 and M2 also act as a voltage subtractor.

CH 12 Feedback

input impedance of an ideal feedback network
Input Impedance of an Ideal Feedback Network
  • To sense a voltage, the input impedance of an ideal feedback network must be infinite.
  • To sense a current, the input impedance of an ideal feedback network must be zero.

CH 12 Feedback

output impedance of an ideal feedback network
Output Impedance of an Ideal Feedback Network
  • To return a voltage, the output impedance of an ideal feedback network must be zero.
  • To return a current, the output impedance of an ideal feedback network must be infinite.

CH 12 Feedback

determining the polarity of feedback
Determining the Polarity of Feedback
  • 1) Assume the input goes either up or down.
  • 2) Follow the signal through the loop.
  • 3) Determine whether the returned quantity enhances or opposes the original change.

CH 12 Feedback

polarity of feedback example i
Polarity of Feedback Example I

Negative Feedback

CH 12 Feedback

polarity of feedback example ii
Polarity of Feedback Example II

Negative Feedback

CH 12 Feedback

polarity of feedback example iii
Polarity of Feedback Example III

Positive Feedback

CH 12 Feedback

input impedance of a v v feedback
Input Impedance of a V-V Feedback
  • A better voltage sensor

CH 12 Feedback

output impedance of a v v feedback
Output Impedance of a V-V Feedback
  • A better voltage source

CH 12 Feedback

input impedance of a v c feedback
Input Impedance of a V-C Feedback
  • A better current sensor.

CH 12 Feedback

output impedance of a v c feedback
Output Impedance of a V-C Feedback
  • A better voltage source.

CH 12 Feedback

input impedance of a c v feedback
Input Impedance of a C-V Feedback
  • A better voltage sensor.

CH 12 Feedback

output impedance of a c v feedback
Output Impedance of a C-V Feedback
  • A better current source.

CH 12 Feedback

wrong technique for measuring output impedance
Wrong Technique for Measuring Output Impedance
  • If we want to measure the output impedance of a C-V closed-loop feedback topology directly, we have to place VX in series with K and Rout. Otherwise, the feedback will be disturbed.

CH 12 Feedback

input impedance of c c feedback
Input Impedance of C-C Feedback
  • A better current sensor.

CH 12 Feedback

output impedance of c c feedback
Output Impedance of C-C Feedback
  • A better current source.

CH 12 Feedback

example test of negative feedback

Laser

Example: Test of Negative Feedback

Negative Feedback

CH 12 Feedback

how to break a loop
How to Break a Loop
  • The correct way of breaking a loop is such that the loop does not know it has been broken. Therefore, we need to present the feedback network to both the input and the output of the feedforward amplifier.

CH 12 Feedback

intuitive understanding of these rules
Intuitive Understanding of these Rules

Voltage-Voltage Feedback

  • Since ideally, the input of the feedback network sees zero impedance (Zout of an ideal voltage source), the return replicate needs to be grounded. Similarly, the output of the feedback network sees an infinite impedance (Zin of an ideal voltage sensor), the sense replicate needs to be open.
  • Similar ideas apply to the other types.

CH 12 Feedback

intuitive understanding of these rules254
Intuitive Understanding of these Rules

Voltage-Voltage Feedback

  • Since the feedback senses voltage, the input of the feedback is a voltage source. Moreover, since the return quantity is also voltage, the output of the feedback is left open (a short means the output is always zero).
  • Similar ideas apply to the other types.

CH 12 Feedback

example phase response
Example: Phase Response
  • As it can be seen, the phase of H(jω) starts to drop at 1/10 of the pole, hits -45o at the pole, and approaches -90o at 10 times the pole.

CH 12 Feedback

example three pole system
Example: Three-Pole System
  • For a three-pole system, a finite frequency produces a phase of -180o, which means an input signal that operates at this frequency will have its output inverted.

CH 12 Feedback

instability of a negative feedback loop
Instability of a Negative Feedback Loop
  • Substitute jω for s. If for a certain ω1, KH(jω1) reaches

-1, the closed loop gain becomes infinite. This implies for a very small input signal at ω1, the output can be very large. Thus the system becomes unstable.

CH 12 Feedback

oscillation example
Oscillation Example
  • This system oscillates, since there’s a finite frequency at which the phase is -180o and the gain is greater than unity. In fact, this system exceeds the minimum oscillation requirement.

CH 12 Feedback

condition for oscillation
Condition for Oscillation
  • Although for both systems above, the frequencies at which |KH|=1 and KH=-180o are different, the system on the left is still unstable because at KH=-180o, |KH|>1. Whereas the system on the right is stable because at KH=-180o, |KH|<1.

CH 12 Feedback

condition for stability
Condition for Stability
  • ωPX, (“phase crossover”), is the frequency at which KH=-180o.
  • ωGX, (“gain crossover”), is the frequency at which |KH|=1.

CH 12 Feedback

stability example i
Stability Example I

CH 12 Feedback

stability example ii
Stability Example II

CH 12 Feedback

marginally stable vs stable
Marginally Stable vs. Stable

Marginally Stable

Stable

CH 12 Feedback

phase margin
Phase Margin
  • Phase Margin = H(ωGX)+180
  • The larger the phase margin, the more stable the negative feedback becomes

CH 12 Feedback

phase margin example
Phase Margin Example

CH 12 Feedback

frequency compensation
Frequency Compensation
  • Phase margin can be improved by moving ωGX closer to origin while maintaining ωPX unchanged.

CH 12 Feedback

frequency compensation example
Frequency Compensation Example
  • Ccomp is added to lower the dominant pole so that ωGX occurs at a lower frequency than before, which means phase margin increases.

CH 12 Feedback

frequency compensation procedure
Frequency Compensation Procedure
  • 1) We identify a PM, then -180o+PM gives us the new ωGX, or ωPM.
  • 2) On the magnitude plot at ωPM, we extrapolate up with a slope of +20dB/dec until we hit the low frequency gain then we look “down” and the frequency we see is our new dominant pole, ωP’.

CH 12 Feedback

miller compensation
Miller Compensation
  • To save chip area, Miller multiplication of a smaller capacitance creates an equivalent effect.

CH 12 Feedback