1 / 13

Switching Hardware

Switching Hardware. Overview. Terminology: n x m switch has n inputs and m outputs Design Goals throughput (depends on traffic model) scalability (a function of n ) Ports and Fabrics ports circuit management (e.g., map VCIs, route datagrams) buffering (input and/or output) fabric

zoe
Download Presentation

Switching Hardware

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Switching Hardware

  2. Overview • Terminology: nxm switch has n inputs and m outputs • Design Goals • throughput (depends on traffic model) • scalability (a function of n) • Ports and Fabrics • ports • circuit management (e.g., map VCIs, route datagrams) • buffering (input and/or output) • fabric • as simple as possible • sometimes do buffering (internal)

  3. Input Output Port Port Input Output Port Port Fabric Input Output Port Port Input Output Port Port Switching Fabric

  4. 2 port 1 Switch 2 1 port 2 Buffering • Wherever contention is possible • input port (contend for fabric) • internal (contend for output port) • output port (contend for link) • Head-of-Line Blocking • input buffering • 59% limit

  5. Crossbar Switches 1 N 1 N

  6. Crossbar Switches O(n2)

  7. Use smaller crossbars 162=256, 42*4*2+2=130

  8. Self-Routing Fabrics • Banyan Network • constructed from simple 2 x 2 switching elements • self-routing header attached to each packet • elements arranged to route based on this header • no collisions if input packets sorted into ascending order • complexity: n log2 n

  9. 001 011 001 110 011 111 110 111 Figure 3.32 Banyan Network 010 010

  10. Port 0 Port 1 Port 0 Port 1 Port 2 Port 3 Port 2 Port 3 Port 4 Port 5 Port 4 Port 5 Port 6 Port 7 Port 6 Port 7 Port 8 Port 9 Port 8 Port 9 Port 10 Port 11 Port 10 Port 11 Port 12 Port 13 Port 12 Port 13 Port 14 Port 15 Port 14 Port 15 Contention 1010 1000

  11. Port 0 Port 1 Port 0 Port 1 Port 2 Port 3 Port 2 Port 3 Port 4 Port 5 Port 4 Port 5 Port 6 Port 7 Port 6 Port 7 Port 8 Port 9 Port 8 Port 9 Port 10 Port 11 Port 10 Port 11 Port 12 Port 13 Port 12 Port 13 Port 14 Port 15 Port 14 Port 15 Sorting 1000 1010

  12. Combination O(nlog2n) O(nlogn)

  13. Inputs Outputs Mux Buffer Memory Demux Write Read Control Control Shared Media Switches

More Related