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FPGA Routing

1. 1. 1. 1. 1. 1. 2. 1. 1. 1. congestion. FPGA Routing. Pathfinder [Ebeling, et al., 1995] Introduced negotiated congestion During each routing iteration, route nets using shortest path Allows overuse (congestion) of routing resources If congestion exists (illegal routing)

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FPGA Routing

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  1. 1 1 1 1 1 1 2 1 1 1 congestion FPGA Routing • Pathfinder [Ebeling, et al., 1995] • Introduced negotiated congestion • During each routing iteration, route nets using shortest path • Allows overuse (congestion) of routing resources • If congestion exists (illegal routing) • Update cost of congested resources based on the amount of overuse • Rip-up all routes and reroute all nets 2

  2. Route Done! illegal? congestion? Routing Resource Graph Resource Graph Rip-up yes no FPGA Routing • VPR – Versatile Place and Route [Betz, et al., 1997] • Uses modified Pathfinder algorithm • Increase performance over original Pathfinder algorithm • Routability-driven routing • Goal: Use fewest tracks possible • Timing-driven routing • Goal: Optimize circuit speed

  3. 0/4 SM SM SM SM SM SM SM SM SM 0/4 0/4 0/4 0/4 0/4 0/4 0/4 0/4 0/4 0/4 0/4 0/4 0/4 0/4 0/4 0/4 0/4 JIT FPGA Routing • Riverside On-Chip Router (ROCR) • Represent routing nets between CLBs as routing between SMs • Resource Graph • Nodes correspond to SMs • Edges correspond to channels between SMs • Capacity of edge equal to the number of wires within the channel • Requires much less memory than VPR as resource graph is much smaller

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