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Combinational Equivalence Checking

Combinational Equivalence Checking. Speaker: Yi-Ling Liu Advisor: Chun-Yao Wang 03/06/07. Outline. Introduction Previous Work Initial Idea Future Work. Outline. Introduction Previous Work Initial Idea Future Work. S2. ︰. S1. ︰. Introduction.

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Combinational Equivalence Checking

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  1. Combinational Equivalence Checking Speaker: Yi-Ling Liu Advisor: Chun-Yao Wang 03/06/07

  2. Outline • Introduction • Previous Work • Initial Idea • Future Work

  3. Outline • Introduction • Previous Work • Initial Idea • Future Work

  4. S2 ︰ S1 ︰ Introduction • Given two different circuits, we want to check if their functionalities are the same • Ex: ? ≡ ? A ? A B ≡ B C

  5. Outline • Introduction • Previous Work • Initial Idea • Future Work

  6. Previous Work(1/2) • To exhaustively simulate all possible patterns is infeasible for practical designs with numerous inputs • The approaches to formally verify the equivalence of two networks • Structural (miter) - The capability of ATPG

  7. A B 1 0 Previous Work(2/2) • Functional - ROBDD (canonic representation) Ex: - ROBDD’s construction ?

  8. 1 - a a a a b b a 1 - (1 - a)  (1 - b) = a + b - a  b b Background(1/5) • Probability-based combinational equivalence checking

  9. (1 - a  b) + c - (1 - a  b)  c a a b 1 - a b b c Background(2/5) • Probability calculation on a tree-structure network • This expression is correct only if the network is a tree structure

  10. Background(3/5) • Aliasing – the situation that the two different networks get the same output probability • Aliasing assignment – the 1’s probability of input variable Xi is and is assigned as

  11. n Number of bits 1 2 3 4 : 24 2 4 8 16 : 16,777,216 (16M) Background(4/5) • Problem - complexity O(2n)

  12. a × b c a × b c a a b b Background(5/5) • Internal tree-structure replacement # inputs = 3 # inputs = 2 However, the tree structure is rare.

  13. Outline • Introduction • Previous Work • Initial Idea • Future Work

  14. Initial Idea (1/3) • Cut the branches - The number of inputs increases - We can’t cut the branches arbitrarily × ×

  15. Initial Idea (2/3) • Add some minterm to both circuits to eliminate the branch Ex: A B C

  16. Initial Idea (3/3) Ex: - How to find these minterms - When the branch in one circuit disappear, if the branch in the other circuit also disappear A B C

  17. Outline • Introduction • Previous Work • Initial Idea • Future Work

  18. Future Work • Think about the previous problems • Find out how SIS does the elimination of the branches

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