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Systems Architecture Lecture 3a: Review of Digital Circuits and Logic Design

This lecture provides a review of digital circuits and logic design, focusing on Boolean functions, expressions, logic gates, decoders, encoders, and multiplexors. The lecture also covers simplification of Boolean expressions and implementation of logic gates using transistors.

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Systems Architecture Lecture 3a: Review of Digital Circuits and Logic Design

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  1. Systems Architecture Lecture 3a: Review of Digital Circuits and Logic Design Jeremy R. Johnson Anatole D. RuslanovWilliam M. Mongan Systems Architecture

  2. Introduction • Objective: To understand how the simple model computer from the previous lecture could be implemented using logic gates. • Review of Boolean functions and expressions • Review of logic gates • Decoders, Encoders, and Multiplexors References: Dewdney, The New Turing Omnibus (Ch. 3, 13, and 28). Systems Architecture

  3. x0 f x1 s Boolean Functions • A Boolean variable has two possible values (true/false) (1/0). • A Boolean function has a number of Boolean input variables and has a Boolean valued output. • A Boolean function can be described using a truth table. • There are 22n Boolean functions of n variables. s x0 x1 f 0 0 0 0 0 0 1 0 0 1 0 1 0 1 1 1 1 0 0 0 1 0 1 1 1 1 0 0 1 1 1 1 Multiplexor function Systems Architecture

  4. Boolean Expressions • An expression built up from variables, and, or, and not. x y x  y 0 0 0 0 1 0 1 0 0 1 1 1 x y x + y 0 0 0 0 1 1 1 0 1 1 1 1 x x 0 1 1 0 and or not Systems Architecture

  5. Boolean Expressions • A Boolean expression is a Boolean function. • Any Boolean function can be written as a Boolean expression • Disjunctive normal form (sums of products) • For each row in the truth table where the output is true, write a product such that the corresponding input is the only input combination that is true • Not unique • E.G. (multiplexor function) s  x0 x1 + s  x0 x1 + s  x0 x1 + s  x0 x1 s x0 x1 f 0 0 0 0 0 0 1 0 0 1 0 1 0 1 1 1 1 0 0 0 1 0 1 1 1 1 0 0 1 1 1 1 Systems Architecture

  6. Boolean Logic • Boolean expressions can be simplified using rules of Boolean logic • Identity law: A + 0 = A and A  1 = A. • Zero and One laws: A + 1 = 1 and A  0 = 0. • Inverse laws: A + A = 1 and A  A = 0. • Commutative laws: A + B = B + A and A  B = B  A. • Associative laws: A + (B + C) = (A + B) + C and A  (B  C) = (A  B)  C. • Distributive laws: A  (B + C) = (A  B) + (A  C) and A + (B  C) = (A + B)  (A + C) • DeMorgan’s laws: A + B = A  B and A  B = A + B • The reason for simplifying is to obtain shorter expressions, which leads to simpler logic circuits. Systems Architecture

  7. Simplification of Boolean Expressions • Simplifying multiplexor expression using Boolean algebra s  x0 x1 + s  x0 x1 + s  x0 x1 + s  x0 x1 = s  x0 x1 + s  x0 x1 + s  x1 x0 + s  x1 x0 (commutative law) = s  x0 (x1 + x1)+ s  x1 (x0 + x0)(distributive law) = s  x0 1+ s  x1 1 (inverse law) = s  x0+ s  x1 (identity law) • Verify that the Boolean function corresponding to this expression has the same truth table as the original function. Systems Architecture

  8. Logic Circuits • A single line labeled x is a logic circuit. One end is the input and the other is the output. If A and B are logic circuits so are: • and gate • or gate • inverter (not) A B A B A Systems Architecture

  9. x0 x1 s Logic Circuits • Given a Boolean expression it is easy to write down the corresponding logic circuit • Here is the circuit for the original multiplexor expression Systems Architecture

  10. Logic Circuits • Here is the circuit for the simplified multiplexor expression x0 x1 s Systems Architecture

  11. Nand Gates • A nand gate is an inverted and gate • All Boolean functions can be implemented usingnandgates(and, or, and not can be implemented using nand) x y x | y 0 0 1 0 1 1 1 0 1 1 1 0 nand x = x x Systems Architecture

  12. Decoder • A decoder is a logic circuit that has n inputs (think of this as a binary number) and 2n outputs. The output corresponding to the binary input is set to 1 and all other outputs are set to 0. d0 b0 d1 b1 d2 d3 Systems Architecture

  13. Encoder • An encoder is the opposite of a decoder. It is a logic circuit that has 2n inputs and n outputs. The output equal to the input line (in binary) that is set to 1 is set to 1. d0 d1 b0 d2 b1 d3 Systems Architecture

  14. Multiplexor • A multiplexor is a switch which routes n inputs to one output. The input is selected using a decoder. d0 d1 d2 d3 s1 s0 Systems Architecture

  15. Implementing Logic Gates with Transistors +V +V A NAND B A output B gate ground ground A Transistor NOT Gate A Transistor NAND Gate Systems Architecture

  16. Exercises • Design an OR gate from NAND gates. • Prove De Morgan’s laws. • Conjunctive normal form consists of products of sums. Obtain a conjunctive normal form for the multiplexor on slide 5 and draw the corresponding circuit. How does the number of gates compare with the circuit on slide 9. • Design a 3  8 decoder. • Design an 8  3 encoder. • Redesign the multiplexor on slide 14 using only inverters, three-input NAND gates, and a single four-input NAND gate. • Show a transistor NOR gate. Systems Architecture

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