1 / 15

4 Bit ALU (Arithmetic Logic Unit) Philips 74HC/HCT181

4 Bit ALU (Arithmetic Logic Unit) Philips 74HC/HCT181. Janusz Labedz Cecilia Angkawidjaya Xiaoying Shi Vanessa Pascua Professor: Dr. Dave Parent Date: Spring 2005. Agenda. Abstract Introduction Project Details Results Time Analysis Conclusions. Abstract.

mandell
Download Presentation

4 Bit ALU (Arithmetic Logic Unit) Philips 74HC/HCT181

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. 4 Bit ALU(Arithmetic Logic Unit)Philips 74HC/HCT181 Janusz Labedz Cecilia Angkawidjaya Xiaoying Shi Vanessa Pascua Professor: Dr. Dave Parent Date: Spring 2005

  2. Agenda • Abstract • Introduction • Project Details • Results • Time Analysis • Conclusions

  3. Abstract • Design a functional equivalent 74HC/HCT181 4-bit ALU • Inputs (14) and outputs (8) of our design are connected via Nand2s, Nand3s, Inverters • Performs 16 operations • Specifications: • Frequency: 200MHz • Power : 26mW • Area : 312um x 572um • The results are verified by Spectre spice simulation tools.

  4. Introduction • An ALU is the fundamental unit of any computing system. • Understanding how an ALU is designed and how it works is essential to building any advanced logic circuits. • The logic operations are performed by NAND2s, NAND3s, & INVERTERS. • Using this knowledge and experience, we can move on to designing more complex integrated circuits.

  5. Philips 74HC/HCT181 • Total 16 arithmetic operations (add, subtract, plus, shift, plus 12 others) • Total 16 logic operations (XOR, AND, NAND, NOR, OR, plus 11 others) • Capable of active-high and active-low operation .

  6. Longest Path Calculations

  7. Final Schematic

  8. Layout

  9. LVS Report

  10. Simulations without DFF

  11. Simulations with DFF

  12. Time Analysis • Estimated time spent on each phase of the project • Verify logic & NC Verilog • 8 days • Verifying timing • 3 days • Layout • 12 days • post extracted timing • 5 days

  13. Lessons Learned • Start early on layout • Use instances • Add DFF early • See Dr. Parent more often to understand the concept fully (the big picture)

  14. Summary • Learned: • Aspects of design processes • Simulation and verification tools • Successfully designed 4 bit ALU with following specifications • Frequency: 200MHz • Power : 26mW • Area : 312um x 572µm • This design concept can be a building block for higher bit ALU, example for 16-bit, 32-bit…

  15. Acknowledgements • Want to thank our group for great effort & wisdom • Thanks to Cadence Design Systems for the VLSI lab • Thanks to Synopsys for software donation • Professor D. P.

More Related