Chapter 9: Memory Management

1. Chapter 9: Memory Management • Background • Swapping • Contiguous Allocation • Paging • Segmentation • Segmentation with Paging Operating System Concepts

2. Background • Program must be brought into memory and placed within a process for it to be run. • Input queue – collection of processes on the disk that are waiting to be brought into memory to run the program. • User programs go through several steps before being run. Operating System Concepts

3. Binding of Instructions and Data to Memory Address binding of instructions and data to memory addresses canhappen at three different stages. • Compile time: If memory location known a priori, absolute code can be generated; must recompile code if starting location changes. • Load time: Must generate relocatable code if memory location is not known at compile time. • Execution time: Binding delayed until run time if the process can be moved during its execution from one memory segment to another. Need hardware support for address maps (e.g., base and limit registers). Operating System Concepts

4. Multistep Processing of a User Program Operating System Concepts

5. Logical vs. Physical Address Space • The concept of a logical address space that is bound to a separate physical address space is central to proper memory management. • Logical address – generated by the CPU; also referred to as virtual address. • Physical address – address seen by the memory unit. • Logical and physical addresses are the same in compile-time and load-time address-binding schemes; logical (virtual) and physical addresses differ in execution-time address-binding scheme. Operating System Concepts

6. Memory-Management Unit (MMU) • Memory Management Unit (MMU) is a hardware device that maps virtual to physical address in the run-time. • In MMU scheme, the value in the relocation register is added to every address generated by a user process at the time it is sent to memory. • The user program deals with logical addresses; it never sees the real physical addresses. • The concept of a logical-address space that is bound to a separate physical-address space is central to proper memory management. Operating System Concepts

7. Dynamic relocation using a relocation register Operating System Concepts

8. Dynamic Loading • To obtain better memory-space utilization, we can use dynamic loading. • Routine is not loaded until it is called • The advantage is better memory-space utilization; unused routine is never loaded. • Useful when large amounts of code are needed to handle infrequently occurring cases. • No special support from the operating system is required implemented through user’s program design. Operating System Concepts

9. Dynamic Linking • Linking postponed until execution time. • Small piece of code, stub, used to locate the appropriate memory-resident library routine. • Stub replaces itself with the address of the routine, and executes the routine. • Operating system needed to check if routine is in processes’ memory address. • Dynamic linking is particularly useful for libraries. • Shared libraries allow programs to link to different versions of libraries. Operating System Concepts

10. Overlays • To enable a process to be larger than the amount of memory allocated to it, we can use overlays. • The idea of overlays is to keep in memory only those instructions and data that are needed at any given time. • Overlay is implemented by user, no special support needed from operating system, programming design of overlay structure is complex • As an example, consider a two-pass assembler as shown in Figure 9.3. An overlay driver (10 KB) is added into the memory. Operating System Concepts

11. Overlays for a Two-Pass Assembler Operating System Concepts

12. Swapping • A process can be swapped temporarily out of memory to a backing store, and then brought back into memory for continued execution. • Backing store is a fast disk large enough to accommodate copies of all memory images for all users. It must provide direct access to these memory images. • Roll out, roll in is a swapping variant used for priority-based scheduling algorithms. Lower-priority process is swapped out so higher-priority process can be loaded and executed. • The system maintains a ready queue consisting of all processes whose memory images are on the backing store or in memory and are ready to run. Operating System Concepts

13. Swapping • Whenever the CPU scheduler decides to execute a process, it calls the dispatcher. The dispatcher selects the next process in the queue and swaps in memory if necessary. • Suppose the process is of size 1 MB and the backing store has the transfer rate of 5 MB/s. transfer time = 1 MB/5 MB/s = 200 ms latency = 8 ms total swap time = 2 x (200 +8) = 416 ms • The quantum should be larger that 416 ms. Operating System Concepts

14. Swapping • A particular concern is a process waiting for an I/O operation. Two solutions are never to swap a process with pending I/O or to execute I/O operations only into operating-system buffers. • Currently, standard swapping is used in few systems. • Modified versions of swapping are found on many systems, i.e., UNIX, Linux, and Windows. Swapping would start only when many processes were running. • Early PCs lacked sophisticated hardware to implement more advanced memory-management methods. For example, the Microsoft Windows 3.1 lets the user swap the process. Operating System Concepts

15. Schematic View of Swapping Operating System Concepts

16. Contiguous Allocation • The main memory must accommodate both the operating system and the various user processes in an efficient way. • Main memory usually into two partitions: • Resident operating system, usually held in low memory with interrupt vector. • User processes then held in high memory. • Single-partition allocation with memory protection • Relocation-register scheme used to protect user processes from each other, and from changing operating-system code and data. • Relocation register contains value of smallest physical address; limit register contains range of logical addresses – each logical address must be less than the limit register. • The relocation-register scheme provides an effective way to allow the operating-system size to change dynamically (load and unload transient code dynamically). Operating System Concepts

17. Hardware Support for Relocation and Limit Registers Operating System Concepts

18. Contiguous Allocation (Cont.) • The simplest methods for memory allocation is to divide memory into several fixed-sized partitions. • Multiple-partition allocation • Hole – block of available memory; holes of various size are scattered throughout memory. • When a process arrives, it is allocated memory from a hole large enough to accommodate it. • Operating system maintains information about:a) allocated partitions b) free partitions (hole) OS OS OS OS process 5 process 5 process 5 process 5 process 9 process 9 process 8 process 10 process 2 process 2 process 2 process 2 Operating System Concepts

19. Dynamic Storage-Allocation Problem This procedure is a particular instance of the general dynamic storage-allocation problem, which is how to satisfy a request of size n from a list of free holes. • First-fit: Allocate the first hole that is big enough. • Best-fit: Allocate the smallest hole that is big enough; must search entire list, unless ordered by size. Produces the smallest leftover hole. • Worst-fit: Allocate the largest hole; must also search entire list. Produces the largest leftover hole. First-fit and best-fit better than worst-fit in terms of speed and storage utilization but generally first fit is faster. Operating System Concepts

20. Fragmentation • External Fragmentation – total memory space exists to satisfy a request, but it is not contiguous. • Statistical analysis of first fit reveals that one-third of memory may be unusable, known as 50-percent rule. • Internal Fragmentation – allocated memory may be slightly larger than requested memory; this size difference is memory internal to a partition, but not being used. • Reduce external fragmentation by compaction • Shuffle memory contents to place all free memory together in one large block. • Compaction is possible only if relocation is dynamic, and is done at execution time. Operating System Concepts

21. Paging • The other solution is to permit the logical-address space of a process to be noncontiguous, thus allowing a process to be allocated physical memory whenever the latter is available. • Two techniques are paging and segmentation. • Traditionally, support for paging has been handled by hardware. Recent design integrates the hardware and operating system. • Divide physical memory into fixed-sized blocks called frames (size is power of 2, between 512 bytes and 8192 bytes). • Divide logical memory into blocks of same size called pages. • The hardware support for paging is illustrated in Figure 9.6 (Address Translation Architecture). Operating System Concepts

22. Address Translation Architecture Operating System Concepts

23. Address Translation Scheme • Address generated by CPU is divided into: • Page number(p) – used as an index into a pagetable which contains base address of each page in physical memory. • Page offset(d) – combined with base address to define the physical memory address that is sent to the memory unit. page number page offset m – n n Where p is an index to the page table and d is the displacement within the page. • The paging model of memory is shown in Figure 9.7. Operating System Concepts

24. Paging Model Example Operating System Concepts

25. Paging • A concrete example is shown in Figure 9.8. • Keep track of all free frames. • To run a program of size n pages, need to find n free frames and load program. • Set up a page table to translate logical to physical addresses. • The operating system keeps the allocation details of physical memory in a data structure called a frame table. • It causes internal fragmentation and increase the context-switching time. Operating System Concepts

26. Paging Example Operating System Concepts

27. Free Frames Before allocation After allocation Operating System Concepts

28. Hardware Support • Most operating systems allocate a page table for each process. • A pointer to the page table is stored with the instruction counter in the process control block. • When the dispatcher is told to start a process, it must be reload the user registers and define the correct page table. • The hardware implementation of the page table can be done in the several ways. • In a system with a small page table, the page table can be implemented as a set of dedicated registers. Operating System Concepts

29. Implementation of Page Table • In most contemporary computers page table is kept in main memory and Page-table base register (PTBR) points to the page table. • Page-table length register (PRLR) indicates size of the page table. • In this scheme every data/instruction access requires two memory accesses. One for the page table and one for the data/instruction. • The two memory access problem can be solved by the use of a special fast-lookup hardware cache called associative memory or translation look-aside buffers(TLBs) Operating System Concepts

30. Associative Memory • Each entry in the TLB consists of two parts: a key (tag) and a value. • If the page number is not in the TLB (TLB miss), a memory reference to the page table must be made. • TLB entries for kernel code are often wired down. • Associative memory – parallel search Address translation (A´, A´´) • If A´ is in associative register, get frame # out. • Otherwise get frame # from page table in memory Page # Frame # Operating System Concepts

31. Associative Memory • TLB entries for kernel code are often wired down. • Some TLBs store address-space identifiers (ASID) in each entry of the TLB. • It provides address space protection for that process. • It allows the TLB to contain entries for several different processes simultaneously. • If the TLB does not support separate ASIDs, every time a new page table is selected, the TLB must be flushed (erased). Operating System Concepts

32. Paging Hardware With TLB Operating System Concepts

33. Effective Access Time • Associative Lookup =  time unit • Assume memory cycle time is t time unit • Hit ratio – percentage of times that a page number is found in the associative registers; ration related to number of associative registers. • Hit ratio =  • Effective Access Time (EAT) EAT =  (t + ) + (1 – ) (2t + ) =  t +   + 2t +  - 2t -   = (2 – )t +  • Example:  = 0.8,  = 20 ns, t = 100 ns EAT = 0.8 x 120 + 0.2 x (200 + 20) = 140 ns. Operating System Concepts

34. Memory Protection • Memory protection implemented by associating protection bit with each frame. • Valid-invalid bit attached to each entry in the page table: • valid indicates that the associated page is in the process’ logical address space, and is thus a legal page. • invalid indicates that the page is not in the process’ logical address space. • Example in Figure 9.11: A system has a 14-bit address space (0 to 16283). A program may use only address 0 to 10468. Page size of 2 KB (2048 B). Addresses in pages 0, 1, 2, 3, 4, and 5 are mapped through the page table. Any attempt to generate an address in pages 6 and 7 finds the invalid page and causes a trap. • Many processes use only a small fraction of the address space. Page-table length register (PRLR) can be used to indicate size of the page table Operating System Concepts

35. Valid (v) or Invalid (i) Bit In A Page Table Operating System Concepts

36. Page Table Structure • Hierarchical Paging • Hashed Page Tables • Inverted Page Tables Operating System Concepts

37. Hierarchical Page Tables • Break up the logical address space into multiple page tables. • A simple technique is a two-level page table. Operating System Concepts

38. Two-Level Paging Example • A logical address (on 32-bit machine with 4K page size) is divided into: • a page number consisting of 20 bits. • a page offset consisting of 12 bits. • Since the page table is paged, the page number is further divided into: • a 10-bit page number. • a 10-bit page offset. • Thus, a logical address is as follows:where p1 is an index into the outer page table, and p2 is the displacement within the page of the outer page table. page number page offset p2 p1 d 10 10 12 Operating System Concepts

39. Two-Level Page-Table Scheme Operating System Concepts

40. Address-Translation Scheme • Address-translation scheme for a two-level 32-bit paging architecture is shown as below. Operating System Concepts

41. Hierarchical Paging • This scheme is known as a forward-mapped page table. • The Pentium-II uses this two-level architecture. • The VAX architecture supports a variation of two-level paging (section + page + offset). • Further division could be made for large logical-address space. • The SPARC architecture (with 32-bit addressing) supports a three-level paging scheme. • The 32-bit Motorola 68030 architecture supports a four-level paging scheme. • However, for 64-bit architectures, hierarchical page are general infeasible. Operating System Concepts

42. Hashed Page Tables • A common approach for handling address spaces larger than 32 bits is to use a hashed page table. • The virtual page number is hashed into a page table. This page table contains a chain of elements hashing to the same location. • Each element consists of three fields: (a) the virtual page number, (b) the value of the mapped page frame, and (c) a pointer to the next element in the linked list. • Virtual page numbers are compared in this chain searching for a match. If a match is found, the corresponding physical frame is extracted. • Clustered page tables are similar to hashed page tables except that each entry in the hash table refers to several pages (16) rather than a single page. It is useful for sparse address spaces. Operating System Concepts

43. Hashed Page Table Operating System Concepts

44. Inverted Page Table • Usually, each process has a page table associated with it. One of drawbacks of this method is that each page table may consist of millions of entries. • To solve this problem, an inverted page table can be be used. There is one entry for each real page (frame) of memory. • Each entry consists of the virtual address of the page stored in that real memory location, with information about the process that owns that page. • Examples of systems using the inverted page tables include 64-bit UltraSPARC and PowerPC. Operating System Concepts

45. Inverted Page Table • To illustrate this method, a simplified version of the implementation of the inverted page is described as: <process-id, page-number, offset>. • Each inverted page-table entry is a pair <process-id, page-number>. The inverted page table is then searched for a match. If a match i found, then the physical address <i, offset> is generated. Otherwise, an illegal address access has been attempted. • Although it decreases memory needed to store each page table, but increases time needed to search the table when a page reference occurs. • Use hash table to limit the search to one — or at most a few — page-table entries. Operating System Concepts

46. Inverted Page Table Architecture Operating System Concepts

47. Shared Pages • Another advantage of paging is the possibility of sharing common code. • Shared code • One copy of read-only (reentrant) code shared among processes (i.e., text editors, compilers, window systems). • Shared code must appear in same location in the logical address space of all processes. • Reentrant code (or pure code) is non-self-modifying code. • Private code and data • Each process keeps a separate copy of the code and data. • The pages for the private code and data can appear anywhere in the logical address space. • As shown in Figure 9.16 a editor occupy 3 pages of size of 50K. For 40 users, the total required space is 2150 KB, instead of 8000 KB. Operating System Concepts

48. Shared Pages Example Operating System Concepts

49. Segmentation • A user view memory as a collection of variable-sized segments as shown in Figure 9.17. • A program is a collection of segments. A segment is a logical unit such as: main program, procedure, function, method, object, local variables, global variables, common block, stack, symbol table, arrays • Segmentation is a memory-management scheme that supports user view of memory. • A logical-address space is a collection of segments. Each segment has a name and a length. • Contrast to segmentation the user specifies only a single address in paging. Operating System Concepts

50. User’s View of a Program Operating System Concepts