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ECE 353 Introduction to Microprocessor Systems. Michael Schulte. Week 7. Administrative Matters. Homework #4 is due Friday, April 4 th , 2008 Quiz #2 is rescheduled for Thursday, April 10 th from 7:15 to 8:30 Discussion section tonight 6:30-8:00pm in 3534 Engineering Hall

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administrative matters
Administrative Matters
  • Homework #4 is due Friday, April 4th, 2008
  • Quiz #2 is rescheduled for Thursday, April 10th from 7:15 to 8:30
  • Discussion section tonight 6:30-8:00pm in 3534 Engineering Hall
    • Memory Maps and Address Decoding
  • Reading for week8
    • ADuC702X Datasheet 53-60, 71-73, 75-79
topics
Topics
  • Microprocessor support circuits
    • Clock and reset generation
    • Power control
    • Microprocessor supervisors
  • I/O subsystems
    • GPIO pin construction
    • I/O port design
    • I/O decoding
    • I/O synchronization
    • ADuC7026 GPIO
clocks
Clocks
  • Clock Generation
    • Clock oscillators
    • External clocks
    • Phase-locked loops (PLLs)
      • Operation and design issues
    • ADuC7026 clocking
      • PLLCON
  • Power Control
    • ADuC7026 operating modes
      • POWCON

ADuC7026

pin-out

reset
Reset
  • The reset signal is used to force the processor into a known state from which operation can reliably be started.
  • On power up, the reset signal should be asserted long enough to ensure that the supply voltages are stable and the oscillator is running and stable
  • Reset Generation
    • RC reset circuit operation
    • Shortcomings

ADuC7026

pin-out

microprocessor supervisors
Microprocessor Supervisors
  • Microprocessor supervisors provide reset functionality for a variety of circumstances
    • Power-up
    • Brown-out
    • Glitches
  • They can also provide a number of other services
    • MAX807

ADuC7026

pin-out

basic system bus operation
Basic System Bus Operation
  • Address
    • Unidirectional from CPU
  • Data
    • Bidirectional
  • Control
    • /RS or /RD – output from CPU
      • Indicates a read operation in progress
    • /WS or /WR – output from CPU
      • Indicates a write operation in progress
    • /WAIT or /READY – input to CPU
      • Used by external device to signal that it is not able to complete transfer yet
  • Read/Write Sequence
i o port basics
I/O Port Basics
  • I/O subsystems allow the CPU to interact with the outside world
  • Basic GPIO pin requirements
    • Configurable as input or output
    • Can set value driven out on the pin
    • Can read the current value on the pin
  • Configurable vs. multiplexed pins
  • Unconditional I/O
    • The I/O device can accept or return data without delay

ADuC7026

pin-out

msi i o ports
MSI I/O Ports
  • Medium Scale Integration (MSI) circuits are available to construct ports
  • Simple byte input ports can be constructed from…
    • Octal buffers
    • Octal registers
  • Simple byte output ports can be constructed from octal registers
p compatible i o devices
P Compatible I/O Devices
  • Complex I/O devices typically require more sophisticated interface and control logic
  • P compatible I/O devices have the necessary logic built in to the device itself
    • Interface designed to be reasonably compatible with many microprocessor buses
    • Need to add decoding/selection logic
    • Example
  • Device controllers
    • An organizational model commonly used to interface to complex I/O devices (serial ports, LCDs, disk drives, etc.)
    • Generic model
    • Example – Hitachi HD44780U LCD Controller
i o address decoding
I/O Address Decoding
  • I/O address decoding determines the logical location of the I/O device
    • Isolated I/O
    • Memory-mapped I/O
  • Input vs. output ports
    • Same address does not guarantee same function!
  • Exhaustive address decoding
  • Partial address decoding
i o address decoding cont
I/O Address Decoding (cont.)
  • Linear selection decoding
    • A single address line is used as the selection criteria for each device
    • Can have n input/output devices in a system with an n-bit address bus
    • Hazards and opportunities
    • Note that this idea has a very limited application space!
conditional i o
Conditional I/O
  • Conditional vs. unconditional transfers
    • I/O synchronization
  • Hardware example
  • Polling
    • Overhead
    • Flags / semaphores
    • Wait loops
    • Timeouts
  • Software exercise
aduc7026 gpio ports
ADuC7026 GPIO Ports
  • The ADuC7026 has 40 pins organized as 5 ports that can be used as digital GPIO
    • All pins have multiple functions in addition being able to be used as GPIO
    • The configuration selection is set through the GPxCON MMR.
aduc7026 gpio mmrs
ADuC7026 GPIO MMRs
  • GPxCON
    • Determine which of a pin’s functions are active
    • This is the configuration column selection on the previous slide

aduc7026.inc

aduc7026 gpio mmrs cont
ADuC7026 GPIO MMRs (cont)
  • GPxPAR
    • PARameters
    • Controls whether or not the internal pull-ups are used.
  • Does not apply to ports 2 and 4
aduc7026 gpio mmrs cont18
ADuC7026 GPIO MMRs (cont)
  • GPxDAT
    • Control the pin direction
    • Set the output state
    • Read the pin value
    • Read the pin values that were present at reset
aduc7026 gpio mmrs cont19
ADuC7026 GPIO MMRs (cont)
  • GPxSET
    • Write 1s to set the output value
    • 0s have no effect
aduc7026 gpio mmrs cont20
ADuC7026 GPIO MMRs (cont)
  • GPxCLR
    • Write 1s to clear the output value
    • 0s have no effect
general purpose i o exercise
General Purpose I/O Exercise
  • Write a program that
  • Configures port P1 as a GP input port and P2 as a GP output port.
  • Sets P2 to 0xF7
  • Reads the value on P1 at reset
  • Copies the value on P1 to P2
  • Changes the least significant nibble of P2 to C, without changing the more significant nibble
wrapping up
Wrapping Up
  • Reading for week8
    • ADUC 53-60, 71-73, 75-79
conditional i o exercise
Conditional I/O Exercise

Write a subroutine to read data from an input device like the hardware example. Assume that the flag is a READY signal (active high). If the device does not become ready after 1 trillion polling attempts, return with R0 = -1, otherwise, return with the data in R0.

conditional i o example
Conditional I/O Example

/MS0 base address = 0x1000 0000

aduc7026 inc
aduc7026.inc

;GPIO

GPIO_MMR_BASE EQU 0xFFFFF400

GP0CON EQU 0x00

GP1CON EQU 0x04

GP2CON EQU 0x08

GP3CON EQU 0x0C

GP4CON EQU 0x10

GP0DAT EQU 0x20

GP0SET EQU 0x24

GP0CLR EQU 0x28

GP0PAR EQU 0x2C

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