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Memory Hierarchy. CPS 5401 Fall 2013 http://svmoore.pbworks.com/ 1 Shirley Moore, Instructor October 10 Class. Learning Outcomes. After completing this lesson, you will be able to: Describe how memory references are processed by the hardware and the operating system.

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memory hierarchy

Memory Hierarchy

CPS 5401 Fall 2013

http://svmoore.pbworks.com/1

Shirley Moore, Instructor

October 10 Class

learning outcomes
Learning Outcomes
  • After completing this lesson, you will be able to:
    • Describe how memory references are processed by the hardware and the operating system.
    • Calculate how memory blocks are mapped to cache locations.
    • Discuss implications of memory system design for application performance.
    • Evaluate ways to change a program to improve use of the cache and memory system.
virtual memory
Virtual Memory
  • Each process’s address space is partitioned in to fixed size pages (e.g., 4Kbytes).
  • Pages are loaded from secondary storage (i.e., disk) into memory as needed.
  • The memory manager keeps track of all pages currently loaded by means of a page table.
  • A page fault occurs when a process requests a page that is not currently loaded into main memory.
  • When a page fault occurs and the main memory is full, the memory manager has to decide which page to evict to make room for the new page.
    • An approximation to Least Recently Used (LRU) is usually used.
  • A translation lookaside buffer (TLB) is a cache for the page table.
    • A TLB miss occurs if the desired mapping is not in the TLB.
cache associativity
Cache Associativity
  • Direct mapped
  • Fully associative
  • Set-associative
  • See http://www.cs.iastate.edu/~prabhu/Tutorial/CACHE/bl_place.html
  • Try it! http://www.cs.iastate.edu/~prabhu/Tutorial/CACHE/bl_place_applet.html
block identification
Block Identification
  • http://www.cs.iastate.edu/~prabhu/Tutorial/CACHE/bl_ident.html
  • http://www.cs.iastate.edu/~prabhu/Tutorial/CACHE/bl_ident_applet.html
block replacement
Block Replacement
  • http://www.cs.iastate.edu/~prabhu/Tutorial/CACHE/bl_replace.html
interaction between cache and memory
Interaction between Cache and Memory
  • http://www.cs.iastate.edu/~prabhu/Tutorial/CACHE/interac.html
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