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CSC 2228 Project Dynamic Voltage Scaling in Mobile Devices

CSC 2228 Project Dynamic Voltage Scaling in Mobile Devices. David Tam, Winnie Tsang, Catalin Drula. What We Did?. Implement DVS algs + develop our own Target: Linux 2.6 & Intel P4-M. Why is this important?. DVS goal = save energy Explore DVS algs on Linux 2.6 & P4-M SpeedStep

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CSC 2228 Project Dynamic Voltage Scaling in Mobile Devices

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  1. CSC 2228 ProjectDynamic Voltage Scaling in Mobile Devices David Tam, Winnie Tsang, Catalin Drula

  2. What We Did? • Implement DVS algs+ develop our own • Target: Linux 2.6 & Intel P4-M

  3. Why is this important? • DVS goal = save energy • Explore DVS algs on Linux 2.6 & P4-M SpeedStep • Used hypothetical idle times • Developed new DVS alg with OS info • DVS alg: • AvgN*, PAST, PEAK, FUTURE

  4. Architecture 3 Components: OS SCHEDULER MOD run_cycles() idle_cycles() excess_cycles() DVS Governors AvgN* Past Peak Future set_speed () increase_speed() decrease_speed() CPUFREQ INTERFACE + DRIVERS

  5. DVS Interpretation • Goal: stretch task to consume 99% of the given quantum • No major changes to scheduler Busy Idle Given Quantum

  6. DVS ALGORITHMS • FUTURE • Our own proposed algorithm • Idea: • Look into the run_queue: • Get hypothetical idle time in the future • Prediction and Speed Setting is same as PAST

  7. EXPERIMENTAL SETUP Platform: • IBM Thinkpad T30 • Redhat 9 2.6.0-test9 Linux kernel. • Intel Mobile Pentium 4 - M processor • Used ACPI in Linux to measure capacity (mWh)

  8. EXPERIMENTAL SETUP Experiments: • Workload is 2m30sec long and consists of: • An mpeg video running in the background • Sleep for 20 seconds • Compile Linux kernel (linking stage) • lasts 20-30 seconds • Sleep for 20 seconds • Same compilation again

  9. Energy Usage 1200 High Speed (1.6 Ghz) Low Speed (1.2 Ghz) 1000 AvgN n=0, hysteresis 50-70, interval 50 AvgN n=5, hysteresis 50-70, interval 800 50 Past, hysteresis 50-70, interval 1000 600 Battery Usage (mWh) Past, hysteresis 40-80, interval 1000 Future, hysteresis 50-70, interval 400 1000 Future, hysteresis 40-80, interval 1000 Peak, interval 1000 200 Peak, interval 500 0 AvgN Static Past Future Peak Algorithm EXPERIMENTAL RESULTS

  10. Compile Time High Speed (1.6 Ghz) 35 Low Speed (1.2 Ghz) 30 AvgN n=0, hysteresis 50-70, interval 50 25 AvgN n=5, hysteresis 50-70, interval 50 Past, hysteresis 50-70, interval 1000 20 Compile Time (s) Past, hysteresis 40-80, interval 1000 15 Future, hysteresis 50-70, interval 1000 10 Future, hysteresis 40-80, interval 1000 Peak, interval 1000 5 Peak, interval 500 0 AvgN Static Past Future Peak Algorithm EXPERIMENTAL RESULTS

  11. FUTURE WORK • Implementation of excess cycle • Fine tuning DVS alg parameters • More workloads • New DVS algs

  12. CONCLUSION & CONTRIBUTIONS • Best policies are AVGn and PAST • DVS algs on new OS & real hardware • Used hype idle times • “Future” alg • Contributions to Linux community: • 4 governors for CPUFreq • Make available on web

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