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Chapter Three. Last revision: 10/23/2014. operation. a. ALU. 32. result. 32. b. 32. Arithmetic. Where we've been: Performance (seconds, cycles, instructions) Abstractions: Instruction Set Architecture Assembly Language and Machine Language What's up ahead:
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Chapter Three
Last revision: 10/23/2014
operation
a
ALU
32
result
32
b
32
maxint
minint
operation
op
a
b
res
result
a
b
S
A
C
B
note: we call this a 2input mux
even though it has 3 inputs!
0
1
cout = a b + a cin + b cin
sum = a xor b xor cin
Case (Op) {
0: R = a ^ b;
1: R = a V b;
2: R = a + b}
R0 = a ^ b;
R1 = a V b;
R2 = a + b;
Case (Op) {
0: R = R0;
1: R = R1;
2: R = R2 }
Result = A + (~B) + 1
B
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Can you see the ripple? How could you get rid of it?
c1 = b0c0 + a0c0 +a0b0
c2 = b1c1 + a1c1 +a1b1c2 =
c3 = b2c2 + a2c2 +a2b2 c3 =
c4 = b3c3 + a3c3 +a3b3 c4 =
Not feasible! Why?
c1 = g0 + p0c0
c2 = g1 + p1c1 c2 =
c3 = g2 + p2c2 c3 =
c4 = g3 + p3c3 c4 =Feasible! Why?
P0 = p3 p2 p1 p0
P1 = p7 p6 p5 p4
P2 =p11 p10 p9 p8
P3 = p15 p14 p13 p12
G0 = g3+p3g2+p3p2g1+p3p2p1g0
G1 = g7+p7g6+p7p6g5+p7p6p5g4
G2 = g11+p11g10+p11p10g9+p11p10p9g8
G3 = g15+p15g14+p15p14g13+p15p14p13g12
1001 Quotient
Divisor 1000 1001010 Dividend–1000 100000
1010000
1010 –1000 10 Remainder (or Modulo result)
See how big a number can be subtracted, creating quotient bit on each step
Binary => 1 * divisor or 0 * divisor
Dividend = Quotient x Divisor + Remainder=>  Dividend  =  Quotient  +  Divisor 
3 versions of divide, successive refinement
Shift Right
Divisor
64 bits
Quotient
Shift Left
64bit ALU
32 bits
Write
Remainder
Control
64 bits
Start: Place Dividend in Remainder
1. Subtract the Divisor register from the
Remainder register, and place the result
in the Remainder register.
2b. Restore the original value by adding the
Divisor register to the Remainder register, &
place the sum in the Remainder register. Also
shift the Quotient register to the left, setting
the new least significant bit to 0.
2a. Shift the
Quotient register
to the left setting
the new rightmost
bit to 1.
3. Shift the Divisor register right1 bit.
n+1
repetition?
Done
Remainder QuotientDivisor0000 011100000010 0000
Remainder < 0
Test Remainder
Remainder 0
No: < n+1 repetitions
Yes: n+1 repetitions (n = 4 here)
Remainder QuotientDivisor0000 0111000000010 0000
1:1110 0111000000010 0000
2:0000 0111000000010 0000
3:0000 0111000000001 0000
1:1111 0111000000001 0000
2:0000 0111000000001 0000
3:0000 0111000000000 1000
1:11111111000000000 1000
2:0000 0111000000000 1000
3:0000 0111000000000 0100
1:0000 0011000000000 0100
2:0000 0011000010000 0100
3:0000 0011000010000 0010
1:0000 0001000010000 0010
2:0000 0001000110000 0010
3:0000 0001000110000 0010
Answer:
Quotient = 3
Remainder = 1
Remainder QuotientDivisor0000 0111000000010 0000
1:1110 0111000000010 0000
2:0000 0111000000010 0000
3:0000 0111000000001 0000
1:1111 0111000000001 0000
2:0000 0111000000001 0000
3:0000 0111000000000 1000
1:1111 1111000000000 1000
2:0000 0111000000000 1000
3:0000 0111000000000 0100
1:0000 0011000000000 0100
2:0000 0011000010000 0100
3:0000 0011000010000 0010
1:0000 0001000010000 0010
2:0000 0001000110000 0010
3:0000 0001000110000 0010
01010 Quotient
Divisor 0001 00001010 Dividend0000 1
–0001 00
0000 0001–0001 000000Remainder (or Modulo result)
0
Divisor
32 bits
Quotient
Shift Left
32bit ALU
32 bits
Shift Left
Remainder
Control
Write
64 bits
Start: Place Dividend in Remainder
1. Shift the Remainder register left 1 bit.
2. Subtract the Divisor register from the left half of the Remainder register, & place the
result in the left half of the Remainder register.
3b. Restore the original value by adding the Divisor
register to the left half of the Remainderregister,
&place the sum in the left half of the Remainder
register. Also shift the Quotient register to the left,
setting the new least significant bit to 0.
3a. Shift the
Quotient register
to the left setting
the new rightmost
bit to 1.
nth
repetition?
Done
Remainder Quotient Divisor0000 01110000 0010
Remainder 0
Test Remainder
Remainder < 0
No: < n repetitions
Yes: n repetitions (n = 4 here)
Divisor
32 bits
32bit ALU
“HI”
“LO”
Shift Left
(Quotient)
Remainder
Control
Write
64 bits
Remainder Divisor0000 01110010
Start: Place Dividend in Remainder
1. Shift the Remainder register left 1 bit.
2. Subtract the Divisor register from the left half of the Remainder register, & place the
result in the left half of the Remainder register.
3b. Restore the original value by adding the Divisor
register to the left half of the Remainderregister,
&place the sum in the left half of the Remainder
register. Also shift the Remainder register to the
left, setting the new least significant bit to 0.
3a. Shift the
Remainder register
to the left setting
the new rightmost
bit to 1.
nth
repetition?
Done. Shift left half of Remainder right 1 bit.
Test Remainder
Remainder < 0
Remainder 0
No: < n repetitions
Yes: n repetitions (n = 4 here)
exponent
decimal point
Sign, magnitude
23
24
6.02 x 10 1.673 x 10
radix (base)
Mantissa
Sign, magnitude
e  127
IEEE F.P. ± 1.M x 2
Representation of floating point numbers in IEEE 754 standard:
single precision
1
8
23
S
E
sign
M
mantissa:
sign + magnitude, normalized
binary significand w/ hidden
integer bit: 1.M
exponent:
excess 127
binary integer
actual exponent is
e = E  127
0 < E < 255 (E can not be 0 or 255)
S
E127
N = (1) 2 (1.M)
0 = 0 00000000 0 . . . 0 1.5 = 1 01111111 10 . . . 0
Magnitude of numbers that can be represented is in the range:
126
127
23
)
2
(1.0)
(2  2
to
2
which is approximately:
38
38
to
3.40 x 10
1.8 x 10
(1). E can not be 00000000 or 11111111 (reserved)
(2). integer comparison valid on IEEE Fl.Pt. numbers of same sign!)
+

+

+

Start
1. Compare the exponents of the two numbers.
Shift the smaller number to the right until its
exponent would match the larger exponent
2. Add the significands
3. Normalize the sum, either shifting right and
incrementing the exponent or shifting left
and decrementing the exponent
Overflow or
Underflow?
Yes
Exception
No
4. Round the siginificand to the appropriate
number of bits
Still normalized?
No
Yes
Done
Small ALU
Big ALU
Sign
Exponent
Fraction
Sign
Exponent
Fraction
Exponent
difference
0 1
0 1
0 1
Shift right
Control
0 1
0 1
Increment or
decrement
Shift left or right
Rounding hardware
Sign
Exponent
Fraction
Start
1. Add the biased exponents of the two
numbers, subtracting the bias from the sum
to get the biased exponent
2. Multiply the significands
3. Normalize the product if necessary, shifting
it right and incrementing the exponent
Overflow or
Underflow?
Yes
Exception
No
4. Round the siginificand to the appropriate
number of bits
No
Still normalized?
Yes
5. Set the sign of the product to positive if the
signs of the original operands are the same;
if they differ make the sign negative
Done
MIPS floatingpoint operands
MIPS floatingpoint assembly language