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EKT 221/4 DIGITAL ELECTRONICS II

EKT 221/4 DIGITAL ELECTRONICS II. Registers, Micro-operations and Implementations - Part2. HIGH LEVEL LANGUAGE Example : C+, VB, JAVA. ASSEMBLY LANGUAGE Example : uP and uC. OPCODE. MICROCODE. Register Transfer Level (RTL). Mircocode (Micro-operations):

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EKT 221/4 DIGITAL ELECTRONICS II

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  1. EKT 221/4 DIGITAL ELECTRONICS II Registers, Micro-operations and Implementations -Part2

  2. HIGH LEVEL LANGUAGE Example : C+, VB, JAVA ASSEMBLY LANGUAGE Example : uP and uC OPCODE MICROCODE Register Transfer Level (RTL) Mircocode (Micro-operations): Operations executed on data stored in registers, performed in one clock cycle Register Transfer Level (RTL): Symbolic notation used to describe micro-operations

  3. Register Transfer Level (RTL) • RTL • an algebraic notation used to define machine level operations • it is not executed by a computer • used to explain how the computer works. • Example: • In 68000 assembly language instruction • ADD#3, D2 • is define in RTL as • [D2] [D2] + 3

  4. Types of Registers • AR (Address Registers) • DR (Data Registers) • PC (Program Counters) • IR (Instruction Registers) • Rn (n indicates the Register number, eg R2)

  5. Bit 7 Bit 0 7 6 5 4 3 2 1 0 8 bit Register 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 Block Diagram of Registers R Register Bit 0 Bit 16 8 bit = 1 byte 16 bit Register PC(H) = PC(15:8) PC(L) = PC(7:0) PC(L) PC(H) H = High order byte L = Low order byte

  6. Basic Symbols • R followed by a number is referring to a register: R2 = second register/register no 2 R2

  7. MEMORY Address Content 10000000 9 10111011 10 11111111 11 Basic Symbols • M refers to Memory with addresses in square braces: Direct Addressing : M[10] = contents of memory address 10 In this example, M[10] refers to 10111011

  8. REGISTER MEMORY Address Address Content Content 10000000 10000000 15 1 00000110 10111011 2 16 11111111 00001111 17 3 Basic Symbols • M refers to Memory with addresses in square braces In-direct Addressing : M[R3] = content of the memory address in R3 00001111 = 15 Ans : M[R3] refers to 10000000

  9. Basic Symbols • Arrow pointing to the right shows transfer of data : R4 R3 = Stores the value of R3 to R4 * The word transfer is misleading, since it implies that data is moved from one location to another. In fact, the data is copied from one location to another since it also still resides in register R3

  10. Basic Symbols • A comma represents simultaneous transfer: R1 R2, R6 R7 = Stores R2 into R1 and at the same time stores R7 into R6.

  11. Basic Symbols • Parenthesis indicates part of the register. R8(1) = bit 1of R8 R8 MSB LSB 7 6 5 4 3 2 1 0 Bit Position 1 0 1 1 1 0 0 0 Content LSB : Least Significant Bit MSB : Most Significant Bit

  12. R3 15 14..9 8 7 6 5 4 3 2 1 0 1 0 1 1 1 0 0 0 1 0..1 Basic Symbols • Parenthesis indicates part of the register. R3(7:0) = the least significant byte of R3 Note : 1 byte = 8 bit

  13. Mathematical and Logical Symbols • Addition is indicated by the + sign: R1 R2+R3 Add R2 and R3, stores in R1 R2 R4+R1 Add R4 and R1, stores in R2 Example 1 : Example 2 :

  14. Mathematical and Logical Symbols • Subtraction is handled not with the minus sign but with complementing. • 1’s complement : • 2’s complement : R3 minus R4 in 1’s complement R5 R3+R4 R3 minus R4 in 2’s complement R5 R3+R4+1

  15. Mathematical and Logical Symbols • EXERCISE: Minus R2 from R1 and stores the answer in R8 (use 2’s comp method) RTL : R8 R1+R2+1 What is the value of R8 if R1 = 01000100 and R2 = 00100011.

  16. Summary

  17. Arithmetic Operations • + Addition • - Subtraction • * Multiplication • / Division Example: R2 R1+R2 Example: R2 R1+R2+1 Example: R2 R1*R2 Example: R2 R1/R2

  18. Conditional Register Transfer • Conditional Statement • Using control signal to control the transfer • Can be symbolised by if-then statement If (K1 = 1) then (R2 R1) • In RTL we can write it as: K1 : R2 R1 A subscripted letter followed by a colon is a conditional

  19. K1 R1 R2 n CLK CLK K1 Conditional Register Transfer K1 : R2 R1 n = no of lines = no of bits Transfer occurs in parallel Transfer occurs here

  20. Conditional Register Transfer Example: K1 :R5 R2 • Content of R2 will be stored in R5 when condition K1 occurs: R5 K R2

  21. Summary Note : Any register may be specified for source 1, source 2, or destination.

  22. Logical Operations Example: R3 R4 v R6 • v OR (SETS Bits) • ^AND (CLEARS Bits) • + EXOR (Complement Bits, 2 Sources) • NOT (Complement Bits, 1 Source) Example: R2 DR ^ R1 Example: PC PC + DR Example: R6 R1

  23. Logical Operations Example: • Let R1 = 10101010 and R2 = 11110000 • After the operations, R0 becomes:

  24. Shift Operations • To Shift left and shift right operations:

  25. Shift Operations Example 1: • Let R2 = 11001001 • After the Shift operation, R1 becomes: Note: These shifts "zero fill". Sometimes a separate flip-flop is used to provide the data shifted in, or to “catch” the data shifted out

  26. Zero Fill R13 R12 R11 R10 0 P Shift Operations • Example 2 : shift left operation P : R1 sl R1 If R1 = 1001, then sl R1 = 0010 sr R1 = 0100

  27. Assignment#1 • Given the 16-bit operand 0010 0111 1011 1010, • what operation must be performed and • what operand must be used: • to clear all even bit positions to 0? • (Assume bit positions are 15 through 0 from left to right) • b) to set the leftmost 4 bits to 1? • c) to complement the centre 8 bits?

  28. Thank you

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