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## PowerPoint Slideshow about ' STT-RAM Circuit Design' - azura

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I-STT MTJ Specs (Jianping)

- UPDATED SPECS
- RP ≈ 744Ω
- TMR ≈ 136%
- AP→P:
- 630μA Max (breakdown current)
- 387μA for 3ns switching
- 330μA for 5ns switching
- P→AP:
- 1.5mA Max (breakdown current)
- Need more device measurements
- IWRITE(P→AP)/IWRITE(AP→P): 1.5-2
- 1ns read pulse (P→AP) with 1% chance of write: 220μA
- AP→P might be better

Maximum Write Currents (Thick Oxide)

- Thin Oxide: 1.25nm
- Max VDD = 1.0V
- LMIN = 50nm
- Medium Oxide: 2.2nm
- Max VDD = 1.5V
- LMIN = 100nm
- Per μm width: IMAX,MEDIUM/IMAX,LVT = 93%
- Thick Oxide: 5.2nm
- Max VDD = 3.3V
- LMIN = 230nm
- Per μm width: IMAX,THICK/IMAX,LVT = 73%

TMR Degradation

SL

BL<M>

BL<2>

BL<1>

Parallel Resistance (R||)

degrades TMR

WL<2>

WL<N>

WL<1>

Parasitic Parallel Resistance

MTJ1,1

MTJ1,2

MTJ1,M

MTJN,M

MTJ2,1

MTJ2,2

MTJ2,M

MTJN,2

MTJN,1

Effective RP and RAP

- Worst case TMR’: largest RP’ and smallest RAP’
- Largest RP’:
- Smallest RAP’

Effective TMR

- Putting it all together:

Example 1kbit Arrays:

- TMR = 120%, M = 2, N = 16, 32-bit words: TMR’ = 4.8%
- TMR = 120%, M = 2, N = 8, 64-bit words: TMR’ = 9.8%
- TMR = 120%, M = 2, N = 4, 128-bit words: TMR’ = 20.7%

Monte Carlo Simulations (M = 2, 3)

- ERROR IN MATLAB CODE used to generate last week’s Monte Carlo plots → Not simulating the intended cases!
- Fixed and reran simulations → results not so good
- Ran multiple simulations with and w/o random variations in RP and TMR (based on worst case from Jianping)
- Extracted worst case TMR’ and TMR’ for 10% read error
- For 128-bit words, with bit read error = 10.0%:
- # error correcting bits = 36 (1/5 word)
- Probability of a word error: 1 in 6,788 reads
- # error correcting bits = 32 (1/4 word)
- Probability of a word error: 1 in 3.59x106 reads
- # error correcting bits = 43 (1/3 word)
- Probability of a word error: 1 in 13.2x1012 reads

Monte Carlo Simulations: M = 2, N = 4

- TMR = 120%
- RP = 500Ω
- 25k Simulations
- TMR’
- Worst Case = 20.7%
- ~10% Read Error = 30.0%

- TMR = 120%, 3σ = ±12%
- RP = 500Ω, 3σ = ±50Ω
- 25k Simulations
- TMR’
- Worst Case = 3.7%
- ~10% Read Error = 25.4%

Monte Carlo Simulations: M = 2, N = 8

- TMR = 120%
- RP = 500Ω
- 25k Simulations
- TMR’
- Worst Case = 9.8%
- ~10% Read Error = 14.6%

- TMR = 120%, 3σ = ±12%
- RP = 500Ω, 3σ = ±50Ω
- 25k Simulations
- TMR’
- Worst Case = -4.1%
- ~10% Read Error = 12.4%

Monte Carlo Simulations: M = 2, N = 16

- TMR = 120%
- RP = 500Ω
- 25k Simulations
- TMR’
- Worst Case = 5.1%
- ~10% Read Error = 8.5%

- TMR = 120%, 3σ = ±12%
- RP = 500Ω, 3σ = ±50Ω
- 25k Simulations
- TMR’
- Worst Case = -10.3%
- ~10% Read Error = 4.7%

Monte Carlo Simulations: M = 3, N = 4

- TMR = 120%
- RP = 500Ω
- 25k Simulations
- TMR’
- Worst Case = 0.0%
- ~10% Read Error = 15.6%

- TMR = 120%, 3σ = ±12%
- RP = 500Ω, 3σ = ±50Ω
- 25k Simulations
- TMR’
- Worst Case = -10.1%
- ~10% Read Error = 15.9%

Monte Carlo Simulations: M = 3, N = 8

- TMR = 120%
- RP = 500Ω
- 25k Simulations
- TMR’
- Worst Case = -11.2%
- ~10% Read Error = -0.6%

- TMR = 120%, 3σ = ±12%
- RP = 500Ω, 3σ = ±50Ω
- 25k Simulations
- TMR’
- Worst Case = -16.7%
- ~10% Read Error = -1.0%

Monte Carlo Simulations: M = 3, N = 16

- TMR = 120%
- RP = 500Ω
- 25k Simulations
- TMR’
- Worst Case = -15.9%
- ~10% Read Error = -11.2%

- TMR = 120%, 3σ = ±12%
- RP = 500Ω, 3σ = ±50Ω
- 25k Simulations
- TMR’
- Worst Case = -23.4%
- ~10% Read Error = -11.4%

Defining IREAD,MAX & IWRITE,MIN

- IREAD,MAX: The maximum read current such that the probability of flipping the MTJ is less than some ε(i.e. ε = 0.1% → IREAD,MAX = 200μA)
- IWRITE,MIN: The minimum write current such that the probability of failing to flip the MTJ is less than some ξ(i.e. ξ = 0.1% → IWRITE,MIN = 600μA)

IREAD/IWRITE for 1T-2MTJ & 1T-3MTJ

BL<1>

- Example: 1T-2MTJ architecture

WL<2>

WL<1>

BL<2>

IWRITE,MIN

α∙IREAD,MAX

IREAD/IWRITE for 1T-2MTJ

RP Case 1:

RAP Case 1:

RP Case 2:

RAP Case 2:

“1”

“1”

“1”

“1”

“0”

“0”

“0”

“0”

RAP

RP

RAP

RP

RP

RP

RP

RAP

RP

RAP

RP

RAP

RP

RP

RAP

RP

IREAD/IWRITE for 1T-3MTJ

RP Case 1:

RAP Case 1:

RP Case 2:

RAP Case 1:

RP

RP

“1”

“0”

RAP

RP

RAP

RP

RP

“1”

“0”

RP

RP

RP

RAP

RAP

RP

RAP

“1”

“1”

“0”

“0”

RP

RP

RAP

RAP

RP

RP

SUMMARY

- TMR Degradation (READING)
- M = 2:
- Not as good as previously thought
- Read circuit need to work for 25-30% TMR
- 10-12% for more wordlines
- M = 3: not really possible (negative TMR)
- IREAD/IWRITE (WRITING)
- For TMR = 120%, χ = 1.5-2:
- M = 2: IREAD/IWRITE > 0.36-0.43
- M = 3: IREAD/IWRITE > 0.42-0.49

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