Power-Aware Variable Partitioning for DSPs with Hybrid PRAM and DRAM Main Memory

1. Power-Aware Variable Partitioning for DSPs with HybridPRAM and DRAM Main Memory Tiantian Liu, Yingchao Zhao, Chun Jason Xue, Minming Li City University of Hong Kong June 8, 2011

2. PRAM (phase change random access memory) VS DRAM WIN WIN WIN WIN Low power consumption Hybrid both? Less performance and endurance degradation

3. What we do? • PRAM or PCM (phase change memory) • reduce write activities: redundant write removing, row shifting • Hybrid PRAM & DRAM (or other types) • Dhiman et. al [DAC’09]: proposes architecture and system policies for managing a PRAM/DRAM based main memory • Mogul et. al [HotOS’09]: provides OS support for a hybrid NOR flash and PRAM main memory. • This paper: software domain • Variable partitioning problem on a hybrid PRAM and DRAM main memory. Only on hardware/controller level Embedded and DSP systems are application-specific Putting data in PRAM can save power Putting data in DRAM can improve performance Conflict But will lead to many writes on PRAM But will consume more power Reduce power consumption while minimizing performance and endurance degradation!

4. Motivational example(1) • Input • A hybrid PRAM and DRAM memory architecture • A DSP application represented by a Data Flow Graph (DFG) • Different time latencies and power consumptions • trd(a), twd(a), trp(a), twp(a) • prd(a), pwd(a), prp(a), pwp(a) • Output: to partition variables to different banks • Objective 1 : The power consumption is minimized. • Objective 2 : The number of writes on PRAM is minimized A node: a variable access operation or an Function Unit (FU) operations An edge: computation dependency between nodes eg: a+b=d

5. Motivational example(2) trd=1, twd=1, trp=2, twp=6, prd=5, pwd=5, prp=1, pwp=3 Power & writes & parallel: put the variables with big write ratio to DRAM Parallel partitioning Our partitioning DRAM PRAM DRAM PRAM c a b a d b c d Schedule length = 19; Power consumption = 29; Writes on PRAM=2. Schedule length = 18; Power consumption = 27; Writes on PRAM=1. Reduced power consumption & reduced number of writes on PRAM & reduced performance overhead

6. Main strategy • Graph models • Interference Graph (IG), Leupers et. al [ICASSP’01]: access interference between variables • Variable Independence Graph (VIG), Zhuge et. al [TSP’03]: schedule step parallel potential between variables • PRAM-aware MAX CUT problem • Heuristic methods • For power consumption: try not to put variables with too many accesses in DRAM; • For endurance: try not to put variables with too many writes in PRAM; • For performance: try to put variables in different banks to maximize parallel accesses. • Integer Linear Programming (ILP) • Suppose with an initial schedule • Objectives: Min P, Min W, Min L Variables with big write ratio to DRAM IG, VIG edge weights

7. 45% 62% 53% 56% Experimental results (d) (e): reduce 79-88% writes than (b) (d) (e): reduce 27-36% writes than (c) Comparison of writes: baseline (b) • Techniques under comparison: • (a) pure DRAM banks & a parallel partitioning; • (b) pure PRAM banks & the parallel algorithm; • (c) a hybrid memory & the parallel algorithm; • (d) a hybrid memory & the proposed heuristic; • (e) a hybrid memory & the proposed ILP (lp_solve) Comparison of power: baseline (a) (c) (e) lead to more power consumption than (d) (d) (e): 8-11% better than (c) (d) sometimes can obtain optimal solutions Comparison of execution time: baseline (a) (d) (e) : increase about 2-18% (d) (e): 2-5% better than (c) • Conclusion： • Introducing PRAM will dramatically save power • The proposed methods obtain better solutions Pure DRAM: About 53-56% power saving VS About 2-18% time increasing Pure PRAM: About 79-88% write reduction

8. Conclusion • Contributions: • Hybrid PRAM and DRAM main memory • Variable partitioning problem • PRAM-aware heuristics • ILP optimal solutions • Experimental results: • Pure DRAM: About 53-56% power saving VS About 2-18% time increasing • Pure PRAM: About 79-88% write reduction • Future work: • ILP without initial schedule: a global optimal • To learn more, please come to my poster!