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Fault-Tolerant Techniques and Nanoelectronic Devices

Fault-Tolerant Techniques and Nanoelectronic Devices. Andy Hill CH E 5480 995. Abstract. Proposed nanocomputers offer faster, more powerful computing Problems expected High manufacturing defect rate Transient errors Two possible solutions Increase manufacturing efficiency

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Fault-Tolerant Techniques and Nanoelectronic Devices

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  1. Fault-Tolerant Techniques and Nanoelectronic Devices Andy Hill CH E 5480 995

  2. Abstract • Proposed nanocomputers offer faster, more powerful computing • Problems expected • High manufacturing defect rate • Transient errors • Two possible solutions • Increase manufacturing efficiency • Increase device’s capacity for defects

  3. Abstract (cont’d) • Most nanoelectronic device research today is devoted to reducing the size of devices • Fault-tolerant technique research shows that the reconfiguration method is: • Can handle the highest defect rate • Cannot handle the current defect rate • May be impractical

  4. Introduction • First computer invented had one function – to solve linear equations • Always a push to be faster, more powerful • Other technologies would aid tremendously from more powerful computers • Military • Artificial Intelligence • Medical / Biological

  5. Literature Review • Fault-tolerant techniques have been studied for over half a century • Research focused on application of technique • Current research focused on techniques for chips with 1012 devices in 1 square cm

  6. Lit Review (cont’d) • Nanoelectronic device research mainly focused on producing molecular scale devices • Limited research on the production of those devices

  7. Theoretical Background • Main fault-tolerant techniques • Redundancy (RMR, CTMR) • NAND multiplexing • Reconfiguration

  8. R-fold (RMR) redundancy (left) is a function of cascaded triple (CTMR) redundancy (right) Redundancy [1]

  9. Multiplexing / Reconfig • NAND multiplexing • Complex system utilizing majority gates and NAND logic • Adaptive to decreasing manufacturing effficiency • Reconfiguration • Units not working are detected • Cluster reconfigured accordingly

  10. Current Research • Research comparing techniques shows reconfiguration can adapt to highest defect rates, but may be impractical [1]

  11. Current research (cont’d) • Nanoelectronic devices being researched are 100 to 1000 times smaller than current devices [2]

  12. Future Directions • Continue research of techniques specific to nano-scaled devices • Determine practicality of reconfiguration • Continue research developing nanoelectronic devices • Research the efficiency of mass producing devices

  13. References [1] - K Nikolic, A Sadek and M Forshaw 2002 Fault-tolerant techniques for nanocomputersNanotechnology13 357-362 [2] - Goldhaber-Gordon D. et al. 1997 Overview of Nanoelectronic Devices Proceedings of the IEEE 85 (4)

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