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Embedded sync support is for 20 bit 4:2:2 output format only.

TVP7002 Embedded Sync Support. Embedded sync support is for 20 bit 4:2:2 output format only. RGB (0-1023) output code range cannot be used. Use either 4-1019 or 64-940/960 range. See REG 15h. AVID Start and Stop registers control horizontal position of SAV/EAV embedded sync codes.

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Embedded sync support is for 20 bit 4:2:2 output format only.

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  1. TVP7002 Embedded Sync Support • Embedded sync support is for 20 bit 4:2:2 output format only. • RGB (0-1023) output code range cannot be used. Use either 4-1019 or 64-940/960 range. See REG 15h. • AVID Start and Stop registers control horizontal position of SAV/EAV embedded sync codes. • The VBLK Offset and Duration registers control embedded V-bit (vertical blank) line position. • The F-bit Start Line registers control the embedded F-bit (field ID) transition line position. • Delay Factor increases to ~ 27 pixels for the 4:2:2 output format. Delay Factor can very slightly (1-3 pixels), • depending on SOG filter setting. • An additional 4 pixels need to be included in the AVID interval for sync insertion. • Due to the increased 4:2:2 format Delay Factor, AVID Stop can exceed the total line length. When • this occurs, total pixels/line must be subtracted from AVID Stop. • AVID Start = Delay Factor + HSync width + Horizontal back-porch • AVID Stop = AVID Start + Active Pixels + 4 • If AVID Stop >= total pixels/line, AVID Stop = AVID Stop – total pixels/line • The AVID Stop Setting must be < (total pixels/line – 6) and >= 4. Result – EAV code position cannot • be precisely set for some graphics formats.

  2. TVP7002 480p60 Embedded Sync Example Total pixels/line = 858 SAV = Start Active embedded sync codes EAV = End Active embedded sync codes EAV SAV EAV 720 122 Active Pixels 16 58 H-Bp AVID Stop AVID Start 64 • AVID Start = Delay Factor + HS Width + H-Bp = 25 + 122 = 147 (93h) • AVID Stop = AVID Start + Active Pixels + 4 = 147 + 720 +4 = 871 • AVID Stop > 858, AVID Stop = 871 - 858 = 13 (0Dh) • 25 used for Delay Factor to compensate for 2.5 MHz SOG filter delay.

  3. TVP7002 720p60 Embedded Sync Example • With tri-level sync sources, the horizontal reference point is the leading sync edge. 720p60 Example: Total pixels/line = 1650 SAV EAV EAV 1280 300 40 Active Pixels 220 70 AVID Stop AVID Start 40 AVID Start = Delay Factor + tri-level sync width + back-porch = 27 + 300 = 327 (147h) AVID Stop = AVID Start + Active Pixels +4 = 327 + 1280 +4 = 1611 AVID Stop < 1650, AVID Stop = 1611 (64Bh)

  4. XGA60 Embedded Sync Example XGA60 Example: Total pixels/line = 1344 Active pixels/line = 1024 HBLNK = 320 SAV EAV EAV 1024 RGB Active Pixels 24 136 160 AVID Stop AVID Start HSync AVID Start = Delay Factor + HSync width + back-porch = 27 + 136 + 160 = 323 (143h) AVID Stop = AVID Start + Active Pixels + 4 = 323 + 1024 +4 = 1351 AVID Stop > 1344, AVID Stop = 1351 – 1344 = 7 AVID Start = 143h AVID Stop = 07h

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