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697GG Nano Computering Fall 2005. CMOL: Device, Circuits, and Architectures. Konstantin K.Likharev and Dmitri B. Strukov Stony Brook University. Prepared by Sheng Xu. The Device. There is a tradeoff between molecule simplicity and functionality

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cmol device circuits and architectures

697GG Nano Computering

Fall 2005

CMOL: Device, Circuits, and Architectures

Konstantin K.Likharev and Dmitri B. Strukov

Stony Brook University

Prepared by Sheng Xu

the device
The Device
  • There is a tradeoff between molecule simplicity and functionality

--Simple ones with nonlinear but monotonic I-V curves are insufficient for highly functional intergrated circuits

--Complex molecule have many configurations are “soft” to thermal fluctuations

--Short and ridig molecules have just few metastable internal states is best choice

--Example of a possible circuit:

  • --The challenges :
  • 1. no process is available of acceptable yield yet due to the difficulty to ensure a unique position of the molecule relative to the electrodes
  • possible solutions: chemical synthesis of molecules including large “floating electrodes”; Self-assembled monolayer (SAM) on the surface
  • 2.Fabrication of wires with nanometer-scale cross-section is difficult
  • possible solutions: Nanoimprint, interference lithography
the circuit
The circuit
  • The only plausible way toward high-performance nanoelectronic circuits: hybrid of integrate molecular device, nanowires and CMOS
  • Fabrication brings the circuit design two requirements: no precise alignment with each other and with CMOS subsystem
    • The resistivit of semiconductor nanowire would be too high for hybrid circuits
    • Chemical synthesized semi- nanowires into highly ordered parallel arrays is not available yet.
  • An approach and CMOL circuit implementation

-form a small angle between nanowire and CMOS wires

need precise aligned with former nanowire

-CMOL modified the form “In-Bar” networks by providing contact pins distributed all over the circuit area.

cmol memories
CMOL Memories
  • CMOL architecture need to be defect-tolerant

-Chemically-dricted self-assemlby of molecular deviecs can not achieve 100% yield

    • Two major techniques: memory matrix reconfiguration, error correction
    • Several analysis results:

chip area VS linear n size of blocks

optimized area per bit VS the molecular device yield

cmol fpga boolean logic circuits
CMOL FPGA: Boolean Logic Circuits
  • Why FPGA style circuits

-The location of a defective gate from outside is hardly possible

-The error detection and correction method is inefficient

  • Two FPGA varieties: LUT & PLA
  • existing problem:
    • LUT: memory array can not provide address decding and output signal sensing. Must be implemented in CMOS subsystem leading to a large overhead
    • PLA: the fraction of open device is of the order of on half comparing to LUT’s one devie which leads to a high power consumption. Meanwhile dynamic logic is not realistic in nanodevices.
  • CMOL cell-based FPGA
    • Mol FPGA configuration approach to reduce original exponential circuit size.

NOR input

cmol crossnets neuromorphic networks
CMOL CrossNets: Neuromorphic Networks
  • From Neural network and more…
    • Neural cell bodies: nanowires
    • Axon and dendrites: mutually perpendicular nanowires of the CMOL crossbar
    • Synapses: molecular latching switches
    • Remark property of CMOL CrossNet: the connectivity could be very large
    • No external software code needed, can be trained to perform certain tasks.
  • Challenges:

--swicth between continuous signal and discrete

--difficult to control synapse

--processes of control single-electron latches are statistical

FlossBar CMOL CrossNet