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Computer Architecture

This review provides an overview of digital computer architecture, covering key terms like binary, bit, nibble, byte, word, and Boolean algebra. It also explains the basic operators and expressions used in Boolean algebra, along with truth tables and logic circuits. The review concludes by discussing the universality of NAND/NOR gates and their applications in combinational circuits.

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Computer Architecture

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  1. Computer Architecture Undergrad review CSC321

  2. Terminology • “Digital” • Discrete, well defined values/steps • Opposite of analog • Analogy: digital is to analog as int is to double • “Binary” • A system consisting of two states • on/off, true/false, yes/no, high/low, 0/1 • Basis for modern computers CSC321

  3. Terminology • “Bit” • Binary-digit • Smallest unit of storage in modern computers • “Nibble” – 4 bits • “Byte” – 8 bits • “Word” – typically two bytes but often refers to the “native” bit length of the machine CSC321

  4. Data Representation • 1000001 • one million, one • sixteen million, seven hundred seventy seven thousand, two hundred, seventeen • two hundred sixty two thousand, one hundred forty five • sixty five • “A” • AJMP assembly language instruction CSC321

  5. Boolean Algebra • Boolean algebra is an algebra that deals with binary variables and logic operations CSC321

  6. Boolean Algebra • Boolean algebra consists of… • A set of symbols that represent variables • Use letters just like “regular algebra” • A, B, C, a, b, c… • Variables are binary (2-valued) • 0, 1 • Three basic operators • AND, OR, NOT • Other symbols • ( ) = CSC321

  7. Boolean Operators • AND • Notation: A · B, AB, (AB), A(B) • Yields a value of 1 when both A and B are 1 • Yields a value of 0 when either A or B is 0 CSC321

  8. Boolean Operators • OR • Notation: A + B • Yields a value of 1 when either A or B is 1 • Yields a value of 0 when both A and B are 0 CSC321

  9. Boolean Operators • NOT • Notation: A, A’ • Yields a value of 1 A is 0 • Yields a value of 0 when A is 1 CSC321

  10. Boolean Expressions • As in “regular” algebra, variables, operators, and symbols can be combined to form expressions or functions F(x, a, b) = x + (a · b) • F is a boolean function of three variables • Often written as: F = x + (a · b) CSC321

  11. Boolean Functions • Typically, we want to exhaustively evaluate a given boolean function • That is, we want to know its functional value for every possible combination of inputs • This leads us to Truth Tables CSC321

  12. Truth Tables • List all possible combinations of input values in the left hand columns • List expression result in the right hand column CSC321

  13. x + 0 = x x + 1 = 1 x + x = x x + x’ = 1 x + y = y + x x + (y + z) = (x + y) + z x(y + z) = xy + xz (x + y)’ = x’y’ (x’)’ = x x · 1 = x x · 0 = 0 x · x = x x · x’ = 0 xy = yx x(yz) = (xy)z x + yz = (x + y)(x + z) (xy)’ = x’ + y’ Axioms CSC321

  14. AND OR NOT Logic Circuits Schematic Symbols • These are the things computers (and other digital devices) are made of • Circuit designers use Boolean algebra to design circuits drawn on schematic drawings • Fabrication facilities use schematic drawings to produce silicon chips CSC321

  15. NAND More Gates • NAND • Shortened form of “not and” CSC321

  16. NOR More Gates • NOR • Shortened form of “not or” CSC321

  17. NAND/NOR • So, what’s so special about NAND and NOR? • NAND and NOR are considered “universal gates” • That is, anything that can be done with AND/OR/NOT can be done with only NAND or NOR gates (one or the other, not both) CSC321

  18. NAND/NOR • The universality of NAND/NOR is important because it means you can make many copies of a single gate type on a single piece of silicon and then use it to create complex circuits on a single chip • Exercise • Show how to make AND, OR, and NOT gates using only • NAND gates • NOR gates CSC321

  19. XOR XOR Operator • Another specialty gate – “odd” function CSC321

  20. BC B A A A 0 1 0 1 00 01 11 10 0 1 0 0 1 0 1 3 2 0 1 3 2 4 5 7 8 1 CD AB 00 01 11 10 0 1 3 2 00 01 4 5 7 8 11 12 13 15 14 10 8 9 11 10 K-Maps • A K-Map is a grid (map) where each square corresponds to a minterm Note the ordering here is Gray code, not binary CSC321

  21. Sum-of-Products • This is what we previously called the “sum-of-minterms” • Form the largest power-of-two groupings of 1’s on the K-map • Create the schematic CSC321

  22. Product-Of-Sums • Instead of forming large adjacent groups of 1’s (on the K-map), form large adjacent groups of 0’s • What does this mean in terms of the original expression/truth-table? • It means you have simplified F’, not F • To “fix” what you’ve done you need only negate the final result them apply De Morgan’s theorem CSC321

  23. Example – Sum-of-Products B’ D’ F C’ A’ D CSC321

  24. Example – Product-of-Sums B’ D F A’ C’ D’ CSC321

  25. So What? • As it turns out, the sum-of-products can be easily implemented with NAND gates • Similarly, the product-of-sums can be easily implemented with NOR gates • This may greatly simplify the design thus saving us money! CSC321

  26. B’ B’ D D’ A’ C’ C’ A’ D’ D NAND/NOR Implementations CSC321

  27. Combinational Circuits • Definition: A connected arrangement of logic gates with a set of inputs and outputs • Specifically, they have no memory and no clock! CSC321

  28. Augend Sum Half-Adder Addend Carry Combinational Circuit Design • Design a Half-Adder • A combinational circuit that adds 2 bits • Input 1 is call the “Augend” • Input 2 is called the “Addend” • Output 1 is called the “Sum” • Output 2 is called the “Carry” CSC321

  29. Carry-in Sum Augend Full-Adder Addend Carry-out Combinational Circuit Design • Design a Full-Adder • A combinational circuit that adds 3 bits • Input 1 is call the “Augend” • Input 2 is called the “Addend” • Input 3 is call the “Carry-in” • Output 1 is called the “Sum” • Output 2 is called the “Carry-out” CSC321

  30. Sequential Circuits • Two primary differences between combinational circuits and sequential circuits • Sequential circuits are synchronous (use a clock) • Sequential circuits have memory (current state) CSC321

  31. Rising edge 1 0 Falling edge One period Clock • A series of pulses • Sometimes referred to as a pulse train • Basically, it’s an digital signal just oscillates between 0 and 1 CSC321

  32. Clock • Clock period is specified in units of time • Seconds, milliseconds, microseconds… • Clock frequency is specified in units of frequency – 1/period – pulses per time-unit • Hertz, Megahertz, Gigahertz… CSC321

  33. Memory Devices • Flip flops • Four basic types • SR, D, JK, T • Each type stores 1-bit (two states: 0/1) • Each maintains its current state until a clock pulse arrives • i.e. Ignores input lines until a clock pulse reaches the clock input CSC321

  34. S Q C R Q’ Clock symbol means that this flip-flop responds to the rising edge of a clock pulse SR Flip-Flop • “Set/Reset” • Two input lines • One clock input line • Two output lines Characteristic Table • Q(t) refers to the current state • Q(t+1) refers to the next state CSC321

  35. “Delay” One input line One clock input line Two output lines D Q C Q’ Clock symbol means that this flip-flop responds to the rising edge of a clock pulse D Flip-Flop Characteristic Table • Q(t+1) refers to the next state CSC321

  36. “JK” Two input lines One clock input line Two output lines J Q C K Q’ Clock symbol means that this flip-flop responds to the rising edge of a clock pulse JK Flip-Flop Characteristic Table • Q(t) refers to the current state • Q(t+1) refers to the next state CSC321

  37. “Toggle” One input line One clock input line Two output lines T Q C Q’ Clock symbol means that this flip-flop responds to the rising edge of a clock pulse T Flip-Flop Characteristic Table • Q(t+1) refers to the next state CSC321

  38. Clock symbol means that this flip-flop responds to the rising edge of a clock pulse Clock symbol means that this flip-flop responds to the falling edge of a clock pulse Edge-Triggering • Output of the flip-flop occurs on the edge of a pulse • Rising edge (0 to 1 transition) • Falling edge (1 to 0 transition) CSC321

  39. 1 1 0 0 Edge-Triggering Positive (rising) edge-triggered output frozen positive clock transition Negative (falling) edge-triggered negative clock transition output frozen CSC321

  40. Edge-Triggering • Setup time • This is the minimum time that the inputs must remain constant before the edge transition • Hold time • This is the amount of time in which the inputs must not change after the edge transition • These values are not to interesting from a theoretical point of view but can make or break a circuit in practice CSC321

  41. Master-Slave Flip-Flops • Two flip-flops of the same type wired together • Master • Rising edge triggered • Receives inputs from “outside world” • Sends outputs to the slave • Slave is falling edge triggered • Falling edge triggered • Receives inputs from master • Sends outputs to the “outside world” • This set-up basically creates a more stable flip-flop in terms of set-up and hold times CSC321

  42. Master Slave J Q J Q C C K Q’ K Q’ Master-Slave JK Flip-Flop CSC321

  43. Sequential Circuits • Combination of logic gates, flip-flops (memory elements), and a clock signal • The circuit can be described in two parts • The combinational part • The sequential part CSC321

  44. The Combinational Part • Describe outputs in terms of logic gates and flip-flop outputs CSC321

  45. The Sequential Part • Flip-flop input equations • Describe the inputs to flip-flop elements in terms of logic gates and other flip-flop elements CSC321

  46. Designing a Circuit • The goal of circuit design is to convert a specification (a bunch of words) into a circuit • No different than software development! • Example • Design a circuit that counts modulo 4 every time it receives a 1 on the input line CSC321

  47. State Diagram X = 0 X = 0 X = 1 X = 1 X = 1 X = 1 X = 0 X = 0 CSC321

  48. State Table CSC321

  49. Flip-Flop Usage • We know we need 2 flip-flops since the counter must count modulo 4 (2 bits) • We can choose any type we want • D, T, SR, JK • By looking at the excitation table for the chosen type we can create flip-flop equations CSC321

  50. JK Flip-Flop Based Design State Table Excitation Table JK Excitation Table CSC321

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